Single Sampling Radar Signal Processing System and Method

• US 20200132806A1
• Filed: 10/24/2019
• Published: 04/30/2020
• Est. Priority Date: 10/26/2018
• Status: Active Grant

• Current Assignee: Shenzhen University (Guangdong Education Department)
• Original Assignee: Shenzhen University (Guangdong Education Department)
• Inventors: Huang, Jianjun, Liu, Xian, Huang, Jingxiong, Kang, Li, Liang, Shengyu, Zeng, Zijian
• Granted Patent: US 10,705,183 B2
• Time in Patent Office: Days
• CPC Class Codes: G01S 7/292 Extracting wanted echo-signals
• CPC Class Codes: G01S 7/352 Receivers

Abstract

A single sampling radar signal processing system is disclosed, wherein the system comprises a pseudo-random sequence generator, an integral sampler, an ADC module, a controller and a compression domain detector, wherein the integral sampler is connected to the pseudo-random sequence generator, the controller and the ADC module, respectively, and the ADC module is connected to the compression domain detector. Since the initial integral sampling time of each pulse signal can be controlled when the integral sampler performs integral sampling on the pulse signal in the radar signal, each pulse signal is sequentially delayed by different times during integral sampling, and a sample value is obtained by compression sampling in a single pulse repetition period. A single sampling radar signal processing method is also disclosed.

Claims

1. A single sampling radar signal processing system, comprising:

a pseudo-random sequence generator, an integral sampler, an ADC module, a controller and a compression domain detector;

wherein

the pseudo-random sequence generator comprises a pseudo-random sequence output end;

the integral sampler comprises a radar signal input end, a pseudo-random sequence receiving end, an integral sampling value output end, a clear signal input end and a control signal input end;

the ADC module comprises an integral sampling value input end and a compression measuring value output end;

the controller comprises a clear signal output end and a control signal output end;

the compression domain detector comprises a compression measuring value input end and a target position output end;

the radar signal input end is connected to a receiving end of the radar, the pseudo-random sequence receiving end is connected to the pseudo-random sequence output end, the integral sampling value output end is connected to the integral sampling value input end, the clear signal input end is connected to the clear signal output end, and the control signal input end is connected to the control signal output end;

the compression measuring value output end is connected to the compression measuring value input end;

the pseudo-random sequence generator is configured to generate a pseudo-random sequence according to a low-speed clock signal input by an external clock, and send the pseudo-random sequence to the integral sampler;

the controller is configured to generate a clear signal and a control signal after receiving a synchronization signal sent by the radar, send the clear signal to the integral sampler, and send the control signal to the integral sampler;

the integral sampler is configured to perform integral sampling on the radar signal according to the pseudo-random sequence, the clear signal and the control signal after receiving the radar signal, which is sent by the radar, of the target to be detected, and control an initial integral sampling time of each pulse signal in the radar signal, so that each of the pulse signals is sequentially delayed by a preset time during integral sampling;

the integral sampler is further configured to send the integral sampling value of one of the pulse signals to the ADC module after obtaining an integral sampling value of one of the pulse signals each time;

the ADC module is configured to quantize the integral sampling value of the pulse signal after receiving the integral sampling value of the pulse signal, obtain a compression measuring value of the pulse signal, and send the compression measuring value of the pulse signal to the compression domain detector; and

the compression domain detector is configured to take a plurality of the pulse signals as a compression sampling period, obtain the target position of the target to be detected according to the compression measuring value of all the pulse signals in one of the compression sampling periods, and output the target position from the target position output end.

2. The system of claim 1, wherein the controller further comprises a synchronization signal input end and a reset signal output end;

the pseudo-random sequence generator further comprises a reset signal receiving end and a control signal receiving end;

the synchronization signal input end is connected to the radio frequency end of the radar, the reset signal output end is connected to the reset signal receiving end, and the control signal output end of the controller is connected to the control signal receiving end of the pseudo-random sequence generator;

the controller is further configured to receive the synchronization signal sent by the radio frequency end of the radar, generate a control signal, a reset signal and a clear signal according to the synchronization signal, send the control signal and the reset signal to the pseudo-random sequence generator, and send the clear signal and the control signal to the integral sampler.

3. The system of claim 2, wherein the pseudo-random sequence further comprises a signal receiving end;

the signal receiving end of the pseudo-random sequence is connected to the low-speed clock signal output end of the external clock;

the pseudo-random sequence is further configured to receive the low-speed clock signal output by the external clock, and generate a pseudo-random sequence according to the low-speed clock signal, the reset signal and the control signal.

4. The system of claim 3, wherein the system further comprises a NOT gate device;

the input end of the NOT gate device is connected to the control signal output end of the controller, and the output end of the NOT gate device is connected to the control signal input end of the ADC module;

the NOT gate device is configured to invert the control signal sent by the controller, obtain an inverted control signal, and send the inverted control signal to the ADC module.

5. The system of claim 4, wherein the ADC module is further configured to receive the inverted control signal sent by the NOT gate device, and determine the time of quantizing the integral sampling value of the pulse signal according to the inverted control signal.

6. A single sampling radar signal processing method, comprising:

performing, by an integral sampler, integral sampling on the radar signal according to a pseudo-random sequence, a clear signal and a control signal after receiving the radar signal, which is sent by the radar, of the target to be detected, and controlling an initial integral sampling time of each pulse signal in the radar signal, so that each of the pulse signals is sequentially delayed by a preset time during integral sampling;

sending, by the integral sampler, the integral sampling value of one of the pulse signals to an ADC module after obtaining an integral sampling value of one of the pulse signals each time;

quantizing, by the ADC module, the integral sampling value of the pulse signal after receiving the integral sampling value of the pulse signal, obtaining a compression measuring value of the pulse signal, and sending the compression measuring value of the pulse signal to a compression domain detector; and

taking, by the compression domain detector, a plurality of the pulse signals as a compression sampling period, obtaining a target position of the target to be detected according to the compression measuring value of all the pulse signals in one of the compression sampling periods, and outputting the target position from a target position output end.

7. The method of claim 6, wherein before receiving, by the integral sample, the radar signal, which is sent by the radar, of the target to be detected, comprising:

receiving, by the controller, the synchronization signal sent by the radar, and generating a control signal, a reset signal, and a clear signal according to the synchronization signal;

sending, by the controller, the control signal and the reset signal to the pseudo-random sequence generator, and sending the clear signal and the control signal to the integral sampler.

8. The method of claim 7, wherein after sending, by the controller, the control signal and the reset signal to the pseudo-random sequence generator, comprising:

receiving, by the pseudo-random sequence generator, the low-speed clock signal output by the external clock, generating a pseudo-random sequence according to the low-speed clock signal, the reset signal and the control signal, and sending the pseudo-random sequence to the integral sampler.

9. The method of claim 8, wherein before sending, by the integral sampler, the integral sampling value of one of the pulse signals to the ADC module after obtaining an integral sampling value of one of the pulse signals each time, comprising:

inverting, by the NOT gate device, the control signal sent by the controller, obtaining an inverted control signal, and sending the inverted control signal to the ADC module.

10. The method of claim 9, wherein quantizing, by the ADC module, the integral sampling value of the pulse signal after receiving the integral sampling value of the pulse signal, obtaining a compression measuring value of the pulse signal, comprising:

determining, by the ADC module, the time at which the integral sampling value of the pulse signal is quantized according to the inverted control signal sent by the NOT gate device after receiving the integral sampling value of the pulse signal, and quantizing the integral sampling value of the pulse signal.