×

DEVICE AND METHOD FOR CALIBRATING A VOLTAGE REGULATOR

  • US 20200133321A1
  • Filed: 10/30/2018
  • Published: 04/30/2020
  • Est. Priority Date: 10/30/2018
  • Status: Active Grant
First Claim
Patent Images

1. An integrated circuit comprising:

  • a voltage monitor circuit having a first input coupled to a reference voltage and a second input;

    a successive approximation register (SAR) circuit having an input coupled to an output of the voltage monitor circuit;

    a low drop out (LDO) regulator having an input coupled to an output of the SAR circuit and an output coupled to the second input and which provides an LDO output;

    a discharge circuit coupled to the LDO output;

    voltage sensing circuit having a first input coupled to the reference voltage during a trim mode and coupled to the LDO output during a monitor mode, having a second input coupled to the reference voltage, and an output which asserts a sense indicator that indicates when a voltage at the first input goes higher or lower than the reference voltage by a predetermined amount; and

    control circuitry configured to;

    control transition from the monitor mode to the trim mode in response to assertion of the sense indicator; and

    during trim mode, control the discharge circuit to periodically discharge the LDO output voltage.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×