Clock Tick Interrupt Configuration Method and Apparatus

• US 20200133328A1
• Filed: 12/24/2019
• Published: 04/30/2020
• Est. Priority Date: 06/27/2017
• Status: Active Grant

• Current Assignee: Alibaba Group Holding Ltd.
• Original Assignee: Alibaba Group Holding Ltd.
• Inventors: Chen, Lingjun, Wang, Bin, Zhu, Liangliang, Zeng, Xu, Liu, Zilong, Cai, Junjie
• Granted Patent: US 11,216,023 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 1/08 Clock generators with changeable or programmable clock frequency
• CPC Class Codes: G06F 1/12 Synchronisation of different clock signals provided by a plurality of clock generators
• CPC Class Codes: G06F 1/3206 Monitoring of events, devices or parameters that trigger a change in power modality
• CPC Class Codes: G06F 1/3228 Monitoring task completion, e.g. by use of idle timers, stop commands or wait commands
• CPC Class Codes: G06F 1/329 by task scheduling
• CPC Class Codes: G06F 1/3296 by lowering the supply or operating voltage
• CPC Class Codes: G06F 9/4825 Interrupt from clock, e.g. time of day
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management
• CPC Class Codes: Y02D 30/50 in wire-line communication networks, e.g. low power modes or reduced link rate

Abstract

A method and an apparatus for setting a time for a tick interrupt are disclosed. The method includes performing a compensation for a system time when a tick interrupt is executed; setting a time of a next tick interrupt according to a timeout task and a compensated system time if the timeout task exists when the tick interrupt is executed; and when a system enters into a low power mode after the tick interrupt is executed, correcting the time of the next tick interrupt according to the timeout task that is updated when the low power mode is entered. The present disclosure can decouple logic relationships between tick interrupts and Idle tasks, thereby reduces the number of division operations that involve rounding, reduces such accumulated error associated with compensation time, and improves the accuracy of the system time, as compared to the existing technologies.

Claims

1. A method implemented by one or more computing devices, the method comprising:

performing a compensation for a system time when a tick interrupt is executed;

setting a time for a next tick interrupt according to a timeout task and a compensated system time if the timeout task exists when the tick interrupt is executed; and

correcting, when a system enters into a low power mode after the tick interrupt is executed, the time for the next tick interrupt according to the timeout task that is updated when the low power mode is entered.

2. The method of claim 1, wherein setting the time for the next tick interrupt according to the timeout task and the compensated system time if the timeout task exists when the tick interrupt is executed comprises:

obtaining a shortest timeout time from timeout task(s) if the timeout task(s) exist(s) when the tick interrupt is executed;

determining an interval time between a corresponding system time after the shortest timeout period has elapsed and the compensated system time; and

setting the time for the next tick interrupt according to the interval time.

3. The method of claim 2, wherein setting the time for the next tick interrupt according to the interval time comprises:

determining whether the interval time is greater than a time threshold;

setting the time for the next tick interrupt to be the time threshold if the interval time is greater than or equal to the time threshold; and

setting the time for the next tick interrupt to be the interval time if the timeout period is less than the time threshold.

4. The method of claim 2, wherein determining the interval time between the corresponding system time after the shortest timeout period has elapsed and the compensated system time comprises:

obtaining a system timeout time corresponding to the system time according to the shortest timeout period; and

subtracting the system timeout time by the compensated system time to obtain the interval time.

5. The method of claim 3, wherein a count address corresponding to the time threshold is not greater than a total count address of a clock source counter.

6. The method of claim 3, further comprising:

setting a time for a first tick interrupt to be the time threshold when the system is initialized.

7. The method of claim 1, wherein correcting, when the system enters into the low power mode after the tick interrupt is executed, the time for the next tick interrupt according to the timeout task that is updated when the low power mode is entered, comprises:

correcting, when the system enters into the low power mode after the tick interrupt is executed and when a new timeout task exists and a corresponding timeout period is shorter than the shortest time of original timeout tasks, the time for the next tick interrupt according to the shortest time of the new timeout task; and

maintaining the time for the next tick interrupt when a new timeout task exists and a corresponding timeout period is not shorter than the shortest time of original timeout tasks, or when no new timeout task exists.

8. The method of claim 1, wherein performing the compensation for the system time when the tick interrupt is executed comprises:

obtaining a number of sleep ticks of a tick counter for the system time during a previous sleep, and a count value of a clock source counter that has elapsed from a previous sleep time to a current time; and

converting the count value of the clock source counter to a number of compensation ticks and adding the number of sleep ticks to the number of compensation ticks to obtain a number of ticks for the current system time.

9. The method of claim 1, further comprising:

setting the time for the next tick interrupt to be the time threshold if no timeout task exists when the tick interrupt is executed.

10. An apparatus comprising:

one or more processors;

memory;

a compensation module stored in the memory and executable by the one or more processors to perform a compensation for a system time when a tick interrupt is executed;

a first interrupt setting module stored in the memory and executable by the one or more processors to set a time for a next tick interrupt according to a timeout task and a compensated system time if the timeout task exists when the tick interrupt is executed; and

an interrupt correction module stored in the memory and executable by the one or more processors to correct, when a system enters into a low power mode after the tick interrupt is executed, the time for the next tick interrupt according to the timeout task that is updated when the low power mode is entered.

11. The apparatus of claim 10, wherein the first interrupt setting module comprises:

a timeout period acquisition sub-module configured to obtain a shortest timeout period from among timeout task(s) if the timeout task(s) exist(s) when the tick interrupt is executed;

an interval determination sub-module configured to determine an interval time between a corresponding system time after the shortest timeout period has elapsed and the compensated system time; and

a setting sub-module configured to set the time for the next tick interrupt according to the interval time.

12. The apparatus of claim 11, wherein the setting sub-module comprises:

a threshold determination unit configured to determine whether the interval time is greater than a time threshold;

a first setting unit configured to set the time for the next tick interrupt to be the time threshold if the interval time is greater than or equal to the time threshold; and

a second setting unit configured to set the time for the next tick interrupt to be the interval time if the timeout period is less than the time threshold.

13. The apparatus of claim 11, wherein the interval determination sub-module comprises:

a conversion unit configured to obtain a system timeout time corresponding to the system time according to the shortest timeout period; and

an interval acquisition unit configured to subtract the system timeout time by the compensated system time to obtain the interval time.

14. The apparatus of claim 12, wherein a count address corresponding to the time threshold is not greater than a total count address of a clock source counter.

15. The apparatus of claim 12, further comprising:

an initial setting module configured to set a time for a first tick interrupt as the time threshold when the system is initialized.

16. The apparatus of claim 10, wherein the interrupt correction module comprises:

a correction sub-module configured to correct, when the system enters into the low power mode after the tick interrupt is executed and when a new timeout task exists and a corresponding timeout period is shorter than the shortest time of original timeout tasks, the time for the next tick interrupt according to the shortest time of the new timeout task; and

a maintenance sub-module configured to maintain the time for the next tick interrupt when a new timeout task exists and a corresponding timeout period is not shorter than the shortest time of original timeout tasks, or when no new timeout task exists.

17. The apparatus of claim 10, wherein the compensation module comprises:

a timing acquisition sub-module configured to obtain a number of sleep ticks of a tick counter for the system time during a previous sleep, and a count value of a clock source counter that has elapsed from a previous sleep time to a current time; and

a compensation sub-module configured to convert the count value of the clock source counter to a number of compensation ticks and adding the number of sleep ticks to the number of compensation ticks to obtain a number of ticks for the current system time.

18. The apparatus of claim 10, further comprising:

a second interrupt setting module configured to set the time for the next tick interrupt as the time threshold if no timeout task exists when the tick interrupt is executed.

19. One or more processor-readable media storing executable instructions that, when executed by one or more processors, cause the one or more processors to perform acts comprising:

performing a compensation for a system time when a tick interrupt is executed; and

setting a time for a next tick interrupt according to a timeout task and a compensated system time is the timeout task exists when the tick interrupt is executed.

20. The one or more processor-readable media of claim 19, the acts further comprising:

correcting, when a system enters into a low power mode after the tick interrupt is executed, the time for the next tick interrupt according to the timeout task that is updated when the low power mode is entered.