POWER MANAGEMENT FOR WORKLOAD OFFLOAD ENGINES

• US 20200133367A1
• Filed: 12/24/2019
• Published: 04/30/2020
• Est. Priority Date: 01/11/2019
• Status: Active Application

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: WANG, Junyuan, MACNAMARA, Chris, MA, Liang, WEI, Changzheng, YANG, Ziye, LI, Jing B., XU, Jun
• Application Number:
  US16/726,679
• Publication Number:
  US 20200133367A1
• Time in Patent Office: Days
• CPC Class Codes: G05B 15/02 electric
• CPC Class Codes: G06F 1/26 Power supply means, e.g. regulation thereof for memories G11C
• CPC Class Codes: G06F 1/266 Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips
• CPC Class Codes: G06F 21/602 Providing cryptographic facilities or services
• CPC Class Codes: G06F 21/72 in cryptographic circuits
• CPC Class Codes: G06F 21/81 by operating on the power supply, e.g. enabling or disabling power-on, sleep or resume operations
• CPC Class Codes: H03M 13/6588 Compression or short representation of variables

Abstract

Examples described herein relate to allocation of power to engines and a surplus power available for use by one or more engines. A power management controller reserves power for one or more processors of the offload engine and provides a surplus power level. Based on a request for a workload performance by the first processor, the power management controller provides power to a processor based on the reserved power for the processor. Allocation of the surplus power can be made based on a priority of a workload relative to other workloads.

Claims

1. An apparatus comprising:

a memory and

a power management controller to;

allocate a reserve power for one or more processors of an offload engine, wherein the one or more processors include a first processor;

reserve a surplus power level; and

in response to a request for a workload performance by the first processor, provide power to the first processor based on the reserve power for the first processor.

2. The apparatus of claim 1, further comprising an offload engine comprising one or more processors and a power allocator, wherein:

in response to a request for the workload performance involving power use of the first processor exceeding associated reserved power, the power allocator is to allocate additional power for the first processor from the surplus power level.

3. The apparatus of claim 1, further comprising an offload engine comprising one or more processors and a power allocator, wherein the power allocator is to prioritize power allocation using the surplus power level based at least on priority of a workload.

4. The apparatus of claim 1, further comprising an offload engine comprising one or more processors and a power allocator, wherein:

the power allocator is to allocate power for a second processor of the one or more processors from the surplus power level.

5. The apparatus of claim 1, further comprising an offload engine, wherein a total power budget allocated to the offload engine includes power reserved for the one or more processors of the offload engine and the surplus power level.

6. The apparatus of claim 1, further comprising an offload engine, wherein the one or more processors of the offload engine are to perform one or more of:

data compression (DC), a public key encryption (PKE), cipher, or authentication.

7. The apparatus of claim 1, further comprising an offload engine and further comprising a processor core communicatively coupled to the offload engine, wherein the processor core is to provide the request for a workload performance to the offload engine.

8. The apparatus of claim 1, further comprising an offload engine, wherein the offload engine and the power management controller are provided in one or more of:

a compute sled, data center, server, rack, or blade.

9. The apparatus of claim 1, further comprising an offload engine, wherein the offload engine comprises Quick Assist Technology (QAT) comprising:

at least one slice to perform data compression (DC),

at least one slice to perform cryptography services including public key encryption (PKE),

at least one slice to perform a cipher activity,

at least one slice to perform authentication, and

the power allocator is to allocate power to one or more of;

at least one slice to perform DC, at least one slice to perform cryptography services including PKE, at least one slice to perform cipher, and at least one slice to perform authentication.

10. A method comprising:

receiving a power allocation comprising a surplus power;

receiving a request to perform a workload;

allocating power to a first processor based on the power allocation, the first processor to perform a portion of the workload; and

allocating power to a second processor from the surplus power, the second processor to perform a second portion of the workload.

11. The method of claim 10, wherein a workload comprises:

a service type, priority of service, source memory address, and destination memory address.

12. The method of claim 11, wherein the service type comprises one or more of:

data compression, data decompression, packet processing, or public key encryption (PKE).

13. The method of claim 10, wherein the first processor and the second processor comprise one or more of:

at least one slice to perform data compression (DC), at least one slice to perform cryptography services including public key encryption (PKE), at least one slice to perform cipher, or at least one slice to perform authentication.

14. The method of claim 10, comprising:

receiving a request to perform a second workload and

allocating power for a third processor to perform the second workload from the power allocation.

15. The method of claim 14, comprising:

determining additional power is needed by the third processor to perform the second workload and

based on the second workload having a higher priority level than the workload, allocating additional power from the surplus power to the third processor and de-allocating power from the surplus power to the second processor.

16. The method of claim 10, comprising:

prioritizing power allocation using the surplus power based on priority of the workload relative to other workloads that are to use the surplus power.

17. A computer-readable medium comprising instructions stored thereon, that if executed, cause one or more processors to:

reserve power for one or more processors;

reserve a surplus power level; and

in response to a request for a workload performance by a processor, provide power to the processor based on a reserved power for the processor.

18. The computer-readable medium of claim 17, comprising instructions stored thereon, that if executed, cause one or more processors to:

in response to a request for the workload performance involving power use of the processor being exceeded, allocating additional power to the processor from the surplus power level.

19. The computer-readable medium of claim 17, comprising instructions stored thereon, that if executed, cause one or more processors to:

prioritize power allocation from the surplus power level based on priority of the workload relative to other workloads that are to use the surplus power level.

20. The computer-readable medium of claim 17, wherein the one or more processors are to perform one or more of:

data compression (DC), a public key encryption (PKE), cipher, or authentication.