VECTORIZED PROCESSING LEVEL CALIBRATION IN A MEMORY COMPONENT
First Claim
1. A system, comprising:
- a memory component including a plurality of memory cells; and
a processing device, operatively coupled to the memory device, to;
determine a first vector having a first magnitude and a first phase angle relative to a reference axis, the first vector corresponding to a difference between an error value for a current processing level for processing data and an error value for a first offset processing level,determine a second vector having a second magnitude and a second phase angle relative to the reference axis, the second vector corresponding to a difference between the error value for the current processing level and an error value for a second offset processing level, wherein the first offset processing level is different from the second offset processing level,generate an estimated processing level offset based on at least one of a difference between the first magnitude and the second magnitude or a difference between the first phase angle and the second phase angle, andgenerate an updated processing level based on the estimated processing level offset, the updated processing level to replace the current processing level,wherein the current processing level and the updated processing level relate to processing the data for a subset of the plurality of memory cells.
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Abstract
First and second vectors each respectively having first and second magnitudes and first and second phase angles relative to a reference axis are determined by a processing device based on a set of error values corresponding a current processing level for processing data in memory operations on memory cells of a memory component. An estimated processing level offset is generated based on a comparison between at least one of a difference between the first magnitude and the second magnitude or a difference between the first phase angle and the second phase angle. An updated processing level is generated based on the estimated processing level offset, and the updated processing level replaces the current processing level.
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Citations
20 Claims
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1. A system, comprising:
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a memory component including a plurality of memory cells; and a processing device, operatively coupled to the memory device, to; determine a first vector having a first magnitude and a first phase angle relative to a reference axis, the first vector corresponding to a difference between an error value for a current processing level for processing data and an error value for a first offset processing level, determine a second vector having a second magnitude and a second phase angle relative to the reference axis, the second vector corresponding to a difference between the error value for the current processing level and an error value for a second offset processing level, wherein the first offset processing level is different from the second offset processing level, generate an estimated processing level offset based on at least one of a difference between the first magnitude and the second magnitude or a difference between the first phase angle and the second phase angle, and generate an updated processing level based on the estimated processing level offset, the updated processing level to replace the current processing level, wherein the current processing level and the updated processing level relate to processing the data for a subset of the plurality of memory cells. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method, comprising:
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sampling center, first, and second error values for a current processing level, a first offset processing level, and a second offset processing level, respectively, wherein the first offset processing level is different from the second offset processing level; determining a first vector having a first magnitude and a first phase angle relative to a reference axis, the first vector corresponding to a difference between the center and first error values; determining a second vector having a second magnitude and a second phase angle relative to the reference axis, the second vector corresponding to a difference between the center and second error values; generating an estimated processing level offset based on at least one of a difference between the first magnitude and the second magnitude or a difference between the first phase angle and the second phase angle; and generating an updated processing level based on the estimated processing level offset, the updated processing level to replace the current processing level, wherein the current processing level and the updated processing level relate to processing data corresponding to a subset of a plurality of memory cells of a memory component. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to:
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determine a first vector having a first magnitude and a first phase angle relative to a reference axis, the first vector corresponding to a difference between an error value for a current processing level for processing data and an error value for a first offset processing level; determine a second vector having a second magnitude and a second phase angle relative to a reference axis, the second vector corresponding to a difference between the error value for the current processing level and an error value for a second offset processing level for processing the data, wherein the first offset processing level is different from the second offset processing level; generate an estimated processing level offset based on at least one of a difference between the first magnitude and the second magnitude or a difference between the first phase angle and the second phase angle; and generate an updated processing level based on the estimated processing level offset, the updated processing level to replace the current processing level, wherein the current processing level and the updated processing level relate to processing the data corresponding to a subset of a plurality of memory cells of a memory component. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification