STORAGE MODULES, METHODS OF OPERATING A STORAGE MODULE, AND METHODS OF OPERATING A HOST CONTROLLING A STORAGE MODULE

• US 20200133565A1
• Filed: 04/17/2019
• Published: 04/30/2020
• Est. Priority Date: 10/24/2018
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Kim, Minsu, Ko, Tae-Kyeong, Kim, Dae-Jeong, Kim, Do-Han, Kim, Sung-Joon, Shin, Wonjae, Lee, Kwanghee, Lee, Changmin, Choi, Insu
• Granted Patent: US 10,884,655 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 12/0238 Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/0891 using clearing, invalidating or resetting means
• CPC Class Codes: G06F 12/1009 using page tables, e.g. page table structures
• CPC Class Codes: G06F 2212/1024 Latency reduction
• CPC Class Codes: G06F 2212/7203 Temporary buffering, e.g. using volatile buffer or dedicated buffer blocks
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/0656 Data buffering arrangements
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]

Abstract

A storage module includes a dynamic random access memory (DRAM) device, a nonvolatile memory device, and a high-speed buffer memory. An method of operating the storage module includes copying target data stored in the nonvolatile memory device to the high-speed buffer memory in response to an external device entering a page fault mode, receiving a first refresh command from the external device, and, in response to the first refresh command, performing a first refresh operation associated with the DRAM device and moving the target data copied to the high-speed buffer memory to the DRAM device during a first refresh reference time.

Claims

1. A method of operating a storage module comprising a dynamic random access memory (DRAM) device, a nonvolatile memory device, and a high-speed buffer memory, the method comprising:

copying target data stored in the nonvolatile memory device to the high-speed buffer memory responsive to an external device entering a page fault mode;

receiving a first refresh command from the external device; and

in response to the first refresh command, performing a first refresh operation associated with the DRAM device and moving the target data copied to the high-speed buffer memory to the DRAM device during a first refresh reference time.

2. The method of claim 1, wherein a signal is not provided from the external device until the first refresh reference time elapses from a time point when the first refresh command is received.

3. The method of claim 1, further comprising:

receiving a valid command from the external device after the first refresh reference time elapses from a time point when the first refresh command is received.

4. The method of claim 1, wherein the target data is copied to the high-speed buffer memory based on an input/output data unit of the nonvolatile memory device.

5. The method of claim 1, further comprising:

performing a second refresh operation on the DRAM device in response to receiving a second refresh command, when the external device is not in the page fault mode; and

receiving a valid command from the external device after a second refresh reference time shorter than the first refresh reference time elapses from a time point when the second refresh command is received.

6. The method of claim 1, wherein whether the external device enters the page fault mode is determined based on a page table comprising information about data previously stored in the DRAM device.

7. The method of claim 6, further comprising:

updating the page table based on information indicating that the target data is moved to the DRAM device.

8. The method of claim 1, wherein copying the target data stored in the nonvolatile memory device to the high-speed buffer memory is performed independently of an operation between the external device and the DRAM device.

9. The method of claim 1, wherein a first operating speed of the high-speed buffer memory is faster than a second operating speed of the nonvolatile memory device.

10. The method of claim 1, wherein a first storage capacity of the nonvolatile memory device is greater than a first storage capacity of the high-speed buffer memory and is greater than a third storage capacity of the DRAM device.

11. The method of claim 1, wherein the DRAM device and the external device communicate with each other based on a double data rate (DDR) interface.

12. A storage module comprising:

a dynamic random access memory (DRAM) device configured to communicate with an external device through a first interface;

a nonvolatile memory device;

a high-speed buffer memory; and

a controller coupled to the first interface, wherein the controller is configured to;

copy target data from the nonvolatile memory device to the high-speed buffer memory responsive to the external device entering a page fault mode,

wherein, during a first refresh reference time in response to a first refresh command from the external device entering the page fault mode, the DRAM device is configured to perform a refresh operation and the controller is further configured to move the target data copied to the high-speed buffer memory to the DRAM device, and

wherein the first refresh reference time is longer than a minimum time required for the DRAM device to perform the refresh operation.

13. The storage module of claim 12, wherein, from a time point when the first refresh command is received from the external device until the first refresh reference time elapses, a signal is not provided through the first interface.

14. The storage module of claim 12, wherein the DRAM device is further configured to:

after the first refresh reference time elapses from a time point when the first refresh command is received from the external device, receive a valid command from the external device through the first interface and perform an operation corresponding to the received valid command.

15. The storage module of claim 12, wherein the controller is further configured to copy the target data from the nonvolatile memory device to the high-speed buffer memory based on a first data unit, and to move the target data copied to the high-speed buffer memory to the DRAM device based on a second data unit identical to or smaller than the first data unit.

16. The storage module of claim 12, wherein the controller is further configured to:

determine whether the external device has entered the page fault mode based on a page table comprising information about data previously stored in the DRAM device; and

after moving the target data copied to the high-speed buffer memory to the DRAM device, update the page table based on the target data being moved to the DRAM device.

17. A method of operating a host that is configured to control a storage module comprising a dynamic random access memory (DRAM) device and a nonvolatile memory device, the method comprising:

entering a page fault mode when target data is absent from the DRAM device;

changing a refresh reference time from a first reference time to a second reference time in response to entering the page fault mode, the second reference time being longer than the first reference time;

transmitting a refresh command to the storage module; and

providing a valid command to the storage module after the second reference time elapses from a time point when the refresh command is transmitted.

18. The method of claim 17, further comprising:

changing the refresh reference time from the second reference time to the first reference time after the second reference time elapses from the time point when the refresh command is transmitted.

19. The method of claim 17, wherein the target data is a first target data, the method further comprising:

determining a hit ratio associated with second target data in the storage module; and

changing the refresh reference time from the second reference time to the first reference time when the hit ratio is not less than a reference value.

20. The method of claim 17, wherein the first reference time is a minimum time required for the DRAM device to perform a refresh operation.