DYNAMICALLY UPDATING VIRTUAL CENTRAL PROCESSING UNITS

• US 20200133704A1
• Filed: 10/30/2018
• Published: 04/30/2020
• Est. Priority Date: 10/30/2018
• Status: Active Grant

• Current Assignee: Red Hat, Inc. (International Business Machines Corporation)
• Original Assignee: Red Hat, Inc. (International Business Machines Corporation)
• Inventors: Habkost, Eduardo Pereira
• Granted Patent: US 10,776,150 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 8/65 Updates security arrangements therefor G06F21/57
• CPC Class Codes: G06F 8/654 using techniques specially adapted for alterable solid state memories, e.g. for EEPROM or flash memories
• CPC Class Codes: G06F 8/656 while running
• CPC Class Codes: G06F 9/455 Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
• CPC Class Codes: G06F 9/45504 Abstract machines for programme code execution, e.g. Java virtual machine [JVM], interpreters, emulators
• CPC Class Codes: G06F 9/45508 Runtime interpretation or emulation, e g. emulator loops, bytecode interpretation
• CPC Class Codes: G06F 9/45533 Hypervisors; Virtual machine monitors
• CPC Class Codes: G06F 9/45558 Hypervisor-specific management and integration aspects
• CPC Class Codes: G06F 9/50 Allocation of resources, e.g. of the central processing unit [CPU]
• CPC Class Codes: G06F 9/5027 the resource being a machine, e.g. CPUs, Servers, Terminals
• CPC Class Codes: G06F 9/5077 Logical partitioning of resources; Management or configuration of virtualized resources specific details on emulation or internal functioning of virtual machines G06F9/455

Abstract

A method includes receiving, by a hypervisor running on a host computer system, a request pertaining to a microcode update from a guest operating system of a virtual machine running on the host computer system. The method also includes identifying, by a hypervisor, a central processing unit (CPU) model including one or more features associated with the microcode update. The method also includes emulating, by the hypervisor, the CPU model on a virtual central processing unit (vCPU) of the virtual machine to provide access to the one or more features of the CPU model to the guest operating system of the virtual machine.

Claims

1. A method, comprising:

receiving, by a hypervisor running on a host computer system, a request pertaining to a microcode update from a guest operating system of a virtual machine running on the host computer system;

identifying, by a hypervisor, a central processing unit (CPU) model comprising one or more features associated with the microcode update; and

emulating, by the hypervisor, the CPU model on a virtual central processing unit (vCPU) of the virtual machine to provide access to the one or more features of the CPU model to the guest operating system of the virtual machine.

2. The method of claim 1, wherein emulating the CPU model on the vCPU further comprises emulating the CPU model on the vCPU while the virtual machine is running.

3. The method of claim 1, wherein identifying the CPU model comprising the one or more features associated with the microcode update further comprises:

determining an identifier of the microcode update based on the request; and

searching a data store for an entry including the identifier of the microcode update, wherein the data store comprises a plurality of entries, and each of the plurality of entries comprises a respective identifier of a respective microcode update, an identifier of a CPU model comprising one or more features associated with the respective microcode update, and an active flag.

4. The method of claim 3, further comprising:

in response to locating the entry including the identifier of the microcode update, modifying the active flag of the entry to indicate the entry is active.

5. The method of claim 1, further comprising, prior to receiving the request pertaining to the microcode update from the guest operating system:

receiving, by the hypervisor, another request pertaining to the microcode update from a virtualization manager, the another request identifying the microcode update and the CPU model comprising the one or more features associated with the microcode update;

add, to a data store, an entry comprising an identifier of the microcode update and an identifier of the CPU model for the microcode update.

6. The method of claim 1, further comprising:

receiving, by the hypervisor from a virtualization manager, a request pertaining to which entry in a data store storing a plurality of identifiers of microcode updates and corresponding identifiers of CPU models includes an active flag set to active;

in response to locating the entry in the data store that includes the active flag set to active, sending at least one of an identifier of a microcode update or an identifier of a CPU model associated with the entry that includes the active flag set to active to the virtualization manager.

7. The method of claim 1, wherein the request pertaining to the microcode update from the guest operating system is received in response to the guest operating system receiving an indication of the microcode update from a channel to which the guest operating system is subscribed.

8. The method of claim 1, wherein the request pertaining to the microcode update from the guest operating system comprises a microcode update blob and the method further comprises determining an identifier of the microcode update by performing a hash function using the microcode update blob.

9. A tangible, non-transitory computer-readable medium storing instructions that, when executed, cause a processing device to:

receive, by a guest operating system running on a virtual machine, an indication of a microcode update;

send, from the guest operating system, a request pertaining to the microcode update to a hypervisor, wherein the request comprises an identifier of the microcode update, the identifier of the microcode update being associated with a feature of a central processing unit (CPU) model to be emulated by the hypervisor on a virtual central processing unit (vCPU) of the virtual machine; and

access, by the guest operating system, the feature of the CPU model to perform the microcode update, the feature being provided by the vCPU after the hypervisor emulates the CPU model on the vCPU of the virtual machine.

10. The non-transitory computer-readable medium of claim 9, wherein the CPU model is to be emulated by the hypervisor on the vCPU of the virtual machine while the virtual machine remains running.

11. The non-transitory computer-readable medium of claim 9, wherein the processing device is further to execute an instruction to obtain information pertaining to the feature of the CPU model that is being emulated on the vCPU.

12. The non-transitory computer-readable medium of claim 11, wherein the processing device is further to modify a data store of the guest operating system in guest memory with the information pertaining to the feature of the CPU model, wherein the data store indicates which features of the CPU model are available to be accessed.

13. The non-transitory computer-readable medium of claim 9, wherein the request pertaining to the microcode update comprises a microcode update blob that the hypervisor uses in a hash function to determine an identifier of the microcode update.

14. The non-transitory computer-readable medium of claim 9, wherein the indication of the microcode update is received from a channel subscribed to by the guest operating system.

15. A system, comprising:

a memory device; and

a processing device coupled to the memory device, the processing device to;

receive, at a hypervisor from a virtualization manager, a request pertaining to a microcode update, the request identifying a microcode update and a corresponding central processing unit (CPU) model for the microcode update;

add, to a data store, an entry comprising an identifier of the microcode update and an identifier of the corresponding CPU model for the microcode update;

receive, from a guest operating system of a virtual machine run by the hypervisor, a request to emulate the microcode update associated with the identifier; and

emulate the corresponding CPU model for the microcode update associated with the identifier on a virtual central processing unit (vCPU) of the virtual machine to provide a feature included in the corresponding CPU model for the microcode update to the guest operating system.

16. The system of claim 15, wherein the processing device is further to emulate the corresponding CPU model for the microcode update associated with the identifier on the virtual vCPU of the virtual machine while the virtual machine remains running.

17. The system of claim 15, wherein the request to emulate the microcode update comprises a microcode update blob and the processing device is further to use a hash function with the microcode update blob to determine the identifier.

18. The system of claim 15, wherein the processing device is further to:

search a data store for an entry including the identifier of the microcode update, wherein the data store comprises a plurality of entries, and each of the plurality of entries comprises a respective identifier of a respective microcode update, an identifier of a CPU model comprising one or more features associated with the respective microcode update, and an active flag.

19. The system of claim 18, wherein the processing device is further to, in response to locating the entry including the identifier of the microcode update, modify the active flag of the entry to indicate the entry is active.

20. The system of claim 15, wherein the processing device is further to:

receive, at the hypervisor from the virtualization manager, a request pertaining to which entry in a data store includes an active flag set to active, wherein the data store stores a plurality of identifiers of microcode updates and corresponding identifiers of CPU models;

in response to locating the entry in the data store that includes the active flag set to active, send at least one of an identifier of a microcode update or an identifier of a CPU model associated with the entry that includes the active flag set to active to the virtualization manager.