DATA-STRUCTURE BASED DYNAMIC PROGRAM TARGETING CONTROL

• US 20200133754A1
• Filed: 10/25/2018
• Published: 04/30/2020
• Est. Priority Date: 10/25/2018
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Sheperek, Michael, Liikanen, Bruce A., Koudele, Larry J., Crowley, James P., Bell, Stuart A.
• Granted Patent: US 10,877,832 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 11/0727 in a storage system, e.g. in a DASD or network based storage system drivers for digital recording or reproducing units G06F3/06; circuits for error detection or correction within digital recording or reproducing units G11B20/18; for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS], H04L67/1097
• CPC Class Codes: G06F 11/076 by exceeding a count or rate limit, e.g. word- or bit count limit
• CPC Class Codes: G06F 11/0793 Remedial or corrective actions recovery from an exception in an instruction pipeline G06F9/3861; by retry G06F11/1402; for recovering from a failure of a protocol instance or entity H04L69/40
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/0673 Single storage device

Abstract

Feedback relating to errors in memory operations on a plurality of memory cells is received by a memory sub-system. At least one processing level corresponding to a program distribution is updated based on the feedback to adjust an error measure between pages of the plurality of memory cells and to adjust a read window budget within a page of the plurality of cells. The updating of the at least one processing level is based on information for the at least one processing level that is stored in a data-structure.

Claims

1. A system, comprising:

a memory component including a plurality of memory cells;

a data-structure corresponding to the plurality of memory cells; and

a processing device, operatively coupled to the memory component and the data-structure, to;

receive feedback related to errors in memory operations on the plurality of memory cells, and

update, based on the feedback and information stored in the data-structure, at least one processing level corresponding to a program distribution to adjust an error measure between pages of the plurality of memory cells and to adjust a read window budget within a page of the plurality of memory cells.

2. The system of claim 1, wherein the data-structure is a look-up-table.

3. The system of claim 1, wherein the error measure is a bit error rate and the feedback is an error count.

4. The system of claim 1, wherein the information stored in the data-structure is trim information that is used for controlling a shifting of the program distribution, including at least one of a magnitude, a direction, or a bandwidth of the shifting.

5. The system of claim 1, wherein the adjusting of the error measure equalizes the error measure between pages of the plurality of memory cells, and

wherein the adjusting of the read window budget equalizes read window budgets within the page.

6. The system of claim 1, wherein the information for the at least one processing level in the data-structure is updateable.

7. The system of claim 1, wherein the at least one processing level corresponds to a program-verify level.

8. A method, comprising:

receiving feedback related to errors in memory operations on a plurality of memory cells, and

updating, based on the feedback and information stored in a data structure, at least one processing level corresponding to a program distribution to adjust an error measure between pages of the plurality of memory cells and to adjust a read window budget within a page of the plurality of memory cells.

9. The method of claim 8, wherein the data structure is a look-up-table.

10. The method of claim 8, wherein the error measure is a bit error rate and the feedback is an error count.

11. The method of claim 8, wherein the information stored in the data-structure is trim information that is used for controlling a shifting of the program distribution, including at least one of a magnitude, a direction, or a bandwidth of the shifting.

12. The method of claim 8, wherein the adjusting of the error measure equalizes the error measure between pages of the plurality of memory cells, and

wherein the adjusting of the read window budget equalizes read window budgets within the page.

13. The method of claim 8, wherein the information for the at least one processing level in the data-structure is updateable.

14. The method of claim 8, wherein the at least one processing level corresponds to a program-verify level.

15. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to:

receive feedback related to errors memory operations on a plurality of memory cells, and

update, based on the feedback and information stored in a data-structure, at least one processing level corresponding to a program distribution to adjust an error measure between pages of the plurality of memory cells and to adjust a read window budget within a page of the plurality of memory cells.

16. The non-transitory computer-readable storage medium of claim 15, wherein the data structure is a look-up-table.

17. The non-transitory computer-readable storage medium of claim 15, wherein the error measure is a bit error rate and the feedback is an error count.

18. The non-transitory computer-readable storage medium of claim 15, wherein the information stored in the data-structure is trim information is used for controlling a shifting of the program distribution, including at least one of a magnitude, a direction, or a bandwidth of the shifting.

19. The non-transitory computer-readable storage medium of claim 15, wherein the adjusting of the error measure equalizes the error measure between pages of the plurality of memory cells, and

wherein the adjusting of the read window budget equalizes read window budgets within the page.

20. The non-transitory computer-readable storage medium of claim 15, wherein the information for the at least one processing level in the data-structure is updateable.