DATA STORAGE DEVICE AND ADAPTIVE DATA-READING METHOD THEREOF

• US 20200133767A1
• Filed: 06/14/2019
• Published: 04/30/2020
• Est. Priority Date: 10/25/2018
• Status: Active Grant

• Current Assignee: Shannon Systems Ltd.
• Original Assignee: Shannon Systems Ltd.
• Inventors: YANG, Xueshi
• Granted Patent: US 10,963,335 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 11/1012 using codes or arrangements adapted for a specific type of error G06F11/1048 takes precedence
• CPC Class Codes: G06F 11/1052 Bypassing or disabling error detection or correction
• CPC Class Codes: G06F 11/1402 Saving, restoring, recovering or retrying
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/1016 Performance improvement
• CPC Class Codes: G06F 2212/1032 Reliability improvement, data loss prevention, degraded operation etc
• CPC Class Codes: G06F 2212/7202 Allocation control and policies
• CPC Class Codes: G06F 2212/7204 Capacity control, e.g. partitioning, end-of-life degradation
• CPC Class Codes: G06F 2212/7206 Reconfiguration of flash memory system
• CPC Class Codes: G06F 2212/7207 management of metadata or control data
• CPC Class Codes: H03M 13/09 Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
• CPC Class Codes: H03M 13/1102 Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
• CPC Class Codes: H03M 13/1111 Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
• CPC Class Codes: H03M 13/152 Bose-Chaudhuri-Hocquenghem [BCH] codes
• CPC Class Codes: H03M 13/3707 Adaptive decoding and hybrid decoding, e.g. decoding methods or techniques providing more than one decoding algorithm for one code
• CPC Class Codes: H03M 13/45 Soft decoding, i.e. using symbol reliability information H03M13/41 takes precedence

Abstract

A data storage device is provided. The data storage device includes a flash memory and a controller. The flash memory includes a plurality of blocks for storing data and each block includes a plurality of pages. The controller is configured to convert a host read command into a read-operation instruction to the flash memory to perform a default read operation to read page data from the flash memory. The default read operation has a default read threshold voltage. In response to a failure of the default read operation, the controller is configured to sequentially perform a read operation on the flash memory using a read threshold voltage with respect to each entry of a plurality of entries in a read-retry table, and replace the default read threshold voltage with the read threshold voltage corresponding to the read operation being successfully performed.

Claims

1. A data storage device, comprising:

a flash memory, comprising a plurality of blocks for storing data, each of the blocks comprising a plurality of pages; and

a controller, configured to receive a host read command from a host, and convert the host read command into a read-operation instruction to the flash memory to perform a default read operation to read page data from one of the pages of the flash memory, wherein the default read operation has a configuration of a default read threshold voltage,

wherein in response to a failure of the default read operation, the controller is configured to sequentially perform a read operation on the flash memory using a configuration of a respective read threshold voltage corresponding to each entry of a plurality of entries in a read-retry table, and replace the configuration of the default read threshold voltage with the configuration of the read threshold voltage corresponding to the read operation being successfully performed.

2. The data storage device as claimed in claim 1, wherein the controller comprises an error-correction circuit configured to perform error correction on the page data read by the default read operation or the read operation,

wherein in response to the error-correction circuit determining being capable of performing error correction on the page data read by the default read operation or the read operation to generate correct page data, the controller determines that the default read operation or the read operation was successfully performed,

wherein in response to the error-correction circuit determining not being capable of performing error correction on the page data read by the default read operation or the read operation to generate correct page data, the controller determines that the default read operation or the read operation has failed.

3. The data storage device as claimed in claim 1, wherein the configuration of the default read threshold voltage and the configuration of the read threshold voltage of each entry in the read-retry table has an initial rank, and the configuration of the default read threshold voltage has the highest initial rank,

wherein the controller calculates an updated ranking of the configuration of the default read threshold voltage and the configuration of the read threshold voltage of each entry in the read-retry table in a check point, replaces the configuration of the default read threshold voltage with the configuration of the read threshold voltage or the configuration of the default read threshold voltage having the highest rank in the updated ranking, and sequentially updates each of other configurations of the read threshold voltages to each entry in the read-retry table according to the updated ranking.

4. The data storage device as claimed in claim 3, wherein the check point is every fixed time cycle.

5. The data storage device as claimed in claim 3, wherein the check point is that a read count of flash memory cells in the flash memory has reached a predetermined number of times.

6. The data storage device as claimed in claim 3, wherein the updating ranking is determined by a success count corresponding to each of the configurations of the read threshold voltages in the entries of the read-retry table and the configuration of the default read threshold voltage in the check point.

7. The data storage device as claimed in claim 3, wherein the updating ranking is determined by a success rate corresponding to each of the configurations of the read threshold voltages in the entries of the read-retry table and the configuration of the default read threshold voltage in the check point.

8. The data storage device as claimed in claim 1, wherein in response to the data storage device being in a specific scenario, the controller replaces the read-retry table with another read-retry table corresponding to the specific scenario.

9. The data storage device as claimed in claim 8, wherein the specific scenario indicates that the data storage device has operated at a higher temperature than a predetermined temperature for a predetermined period of time, or that an average erase count of flash memory cells in the flash memory is greater than a predetermined erase count.

10. The data storage device as claimed in claim 2, wherein in response to the read operation corresponding to the configuration of the read threshold voltage in each entry in the read-retry table performed by the error-correction circuit indicating a failure, the controller performs soft-decoding error correction on the page data read by the read operation using the configuration of the read threshold voltage of each entry in the read-retry table to generate corrected correct page data, and reports the corrected correct page data to the host.

11. An adaptive data-reading method, for use in a data-storage device, wherein the data storage device comprises a flash memory having a plurality of blocks, and each of the blocks comprises a plurality of pages, the method comprising:

receiving a host read command from a host;

converting the host read command into a read-operation instruction to the flash memory to perform a default read operation to read page data from one of the pages of the flash memory, wherein the default read operation has a configuration of a default read threshold voltage; and

in response to a failure of the default read operation, sequentially performing a read operation on the flash memory using a configuration of a read threshold voltage corresponding to each entry of a plurality of entries in a read-retry table, and replacing the configuration of the default read threshold voltage with the configuration of the read threshold voltage corresponding to the read operation being successfully performed.

12. The method as claimed in claim 11, wherein the controller comprises an error-correction circuit configured to perform error correction on the page data read by the default read operation or the read operation, and the method further comprises:

in response to the error-correction circuit determining being capable of performing error correction on the page data read by the default read operation or the read operation to generate correct page data, determining that the default read operation or the read operation was successfully performed; and

in response to the error-correction circuit determining not being capable of performing error correction on the page data read by the default read operation or the read operation to generate correct page data, determining that the default read operation or the read operation has failed.

13. The method as claimed in claim 11, wherein the configuration of the default read threshold voltage and the configuration of the read threshold voltage of each entry in the read-retry table has an initial ranking, and the configuration of the default read threshold voltage has the highest initial rank, and the method further comprises:

calculating an updated ranking of the configuration of the default read threshold voltage and the configuration of the read threshold voltage of each entry in the read-retry table in a check point;

replacing the configuration of the default read threshold voltage with the configuration of the read threshold voltage or the configuration of the default read threshold voltage having the highest rank in the updated ranking; and

sequentially updating each of other configurations of the read threshold voltages to each entry in the read-retry table according to the updated ranking.

14. The method as claimed in claim 13, wherein the check point indicates every fixed time cycle.

15. The method as claimed in claim 13, wherein the check point indicates that a read count of flash memory cells in the flash memory has reached a predetermined number of times.

16. The method as claimed in claim 13, further comprising:

determining the updated ranking by a success count corresponding to each of the configurations of the read threshold voltages in the entries of the read-retry table and the configuration of the default read threshold voltage in the check point.

17. The method as claimed in claim 13, further comprising:

determining the updating ranking by a success rate corresponding to each of the configurations of the read threshold voltages in the entries of the read-retry table and the configuration of the default read threshold voltage in the check point.

18. The method as claimed in claim 11, further comprising:

in response to the data storage device being in a specific condition, replacing the read-retry table with another read-retry table corresponding to the specific scenario.

19. The method as claimed in claim 18, wherein the specific scenario indicates that the data storage device has operated at a higher temperature than a predetermined temperature for a predetermined period of time, or that an average erase count of flash memory cells in the flash memory is greater than a predetermined erase count.

20. The method as claimed in claim 12, further comprising:

in response to the read operation corresponding to the configuration of the read threshold voltage in each entry in the read-retry table performed by the error-correction circuit indicating a failure, performing soft-decoding error correction on the page data read by the read operation using the configuration of the read threshold voltage of each entry in the read-retry table to generate corrected correct page data; and

reporting the corrected correct page data to the host.