MIXING RESTARTABLE AND NON-RESTARTABLE REQUESTS WITH PERFORMANCE ENHANCEMENTS
First Claim
1. A computer-implemented method comprising:
- setting a respective flag in a first buffer of a hardware accelerator;
maintaining a hardware state of the hardware accelerator in the first buffer, based on the respective flag of the first buffer being set;
receiving a first request directed to the hardware accelerator;
determining that the first buffer has the respective flag set; and
passing the first request to the hardware accelerator, wherein the passing the first request comprises passing to the hardware accelerator a pointer to the first buffer, based on the first buffer having the respective flag set.
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Accused Products
Abstract
A computer-implemented method includes setting a respective flag in a first buffer of a hardware accelerator. The first buffer includes the respective flag of the first buffer, and a second buffer of the hardware accelerator includes a respective flag of the second buffer. A hardware state of the hardware accelerator is maintained in the first buffer, based on the respective flag of the first buffer being set. A first request directed to the hardware accelerator is received. It is determined that that the first buffer has the respective flag set. The first request is passed to the hardware accelerator, where passing the first request includes passing to the hardware accelerator a pointer to the first buffer, based on the first buffer having the respective flag set.
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Citations
20 Claims
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1. A computer-implemented method comprising:
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setting a respective flag in a first buffer of a hardware accelerator; maintaining a hardware state of the hardware accelerator in the first buffer, based on the respective flag of the first buffer being set; receiving a first request directed to the hardware accelerator; determining that the first buffer has the respective flag set; and passing the first request to the hardware accelerator, wherein the passing the first request comprises passing to the hardware accelerator a pointer to the first buffer, based on the first buffer having the respective flag set. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A system comprising:
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a memory having computer-readable instructions; and one or more processors for executing the computer-readable instructions, the computer-readable instructions comprising instructions for; setting a respective flag in a first buffer of a hardware accelerator; maintaining a hardware state of the hardware accelerator in the first buffer, based on the respective flag of the first buffer being set; receiving a first request directed to the hardware accelerator; determining that the first buffer has the respective flag set; and passing the first request to the hardware accelerator, wherein the passing the first request comprises passing to the hardware accelerator a pointer to the first buffer, based on the first buffer having the respective flag set. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. A computer-program product for executing requests on a hardware accelerator, the computer-program product comprising a computer-readable storage medium having program instructions embodied therewith, the program instructions executable by a processor to cause the processor to perform a method comprising:
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setting a respective flag in a first buffer of a hardware accelerator; maintaining a hardware state of the hardware accelerator in the first buffer, based on the respective flag of the first buffer being set; receiving a first request directed to the hardware accelerator; determining that the first buffer has the respective flag set; and passing the first request to the hardware accelerator, wherein the passing the first request comprises passing to the hardware accelerator a pointer to the first buffer, based on the first buffer having the respective flag set. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification