INTEGRATED CIRCUIT AND METHOD OF MANUFACTURING THE SAME
First Claim
1. An integrated circuit comprising:
- a first active region and a second active region in a substrate, the first active region and the second active region being separated from each other in a first direction, and being located on a first level;
a third active region in the substrate, the third active region being located on the first level and being separated from the second active region in a second direction different from the first direction;
a first contact extending in the second direction, overlapping the first active region, and being located on a second level different from the first level; and
a second contact extending in the first direction and the second direction, overlapping the first contact and the third active region, being electrically coupled to the first contact, and being located on a third level different from the first level and the second level.
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Accused Products
Abstract
An integrated circuit includes a first active region, a second active region, a third active region, a first contact and a second contact. The first active region and the second active region are separated from each other in a first direction, and are located on a first level. The third active region is located on the first level and is separated from the second active region in a second direction different from the first direction. The first contact extends in the second direction, overlaps the first active region, and is located on a second level different from the first level. The second contact extends in the first direction and the second direction, overlaps the first contact and the third active region, is electrically coupled to the first contact, and is located on a third level different from the first level and the second level.
1 Citation
20 Claims
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1. An integrated circuit comprising:
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a first active region and a second active region in a substrate, the first active region and the second active region being separated from each other in a first direction, and being located on a first level; a third active region in the substrate, the third active region being located on the first level and being separated from the second active region in a second direction different from the first direction; a first contact extending in the second direction, overlapping the first active region, and being located on a second level different from the first level; and a second contact extending in the first direction and the second direction, overlapping the first contact and the third active region, being electrically coupled to the first contact, and being located on a third level different from the first level and the second level. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. An integrated circuit comprising:
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a first set of active regions in a substrate, the first set of active regions extending in a first direction, being located on a first level; a second set of active regions in the substrate, the second set of active regions extending in the first direction, being located on the first level, and being separated from the first set of active regions in a second direction different from the first direction; a first set of contacts extending in the second direction, overlapping at least the first set of active regions or the second set of active regions, and being located on a second level different from the first level, each of the contacts of the first set of contacts being separated from an adjacent contact of the first set of contacts in the first direction, the first set of contacts being electrically coupled to at least the first set of active regions or the second set of active regions; and a second set of contacts extending in the first direction and the second direction, overlapping the first set of contacts, and being located on a third level different from the first level and the second level, the second set of contacts being electrically coupled to a first contact of the first set of contacts. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 17)
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18. A method of forming an integrated circuit (IC), the method comprising:
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generating, by a processor, a cell layout design of the integrated circuit, wherein the generating of the cell layout design comprises; generating a set of active region layout patterns extending in a first direction, being located on a first layout level, and being separated from one another in a second direction different from the first direction, the set of active regions layout patterns corresponding to fabricating a set of active regions in a substrate; generating a set of gate layout patterns extending in the second direction, overlapping the set of active region layout patterns, and being located on a second layout level different from the first layout level, each of the gate layout patterns of the set of gate layout patterns being separated from an adjacent gate layout pattern of the set of gate layout patterns in the first direction, the set of gate layout patterns corresponding to fabricating a set of gates; generating a first set of contact layout patterns extending in the second direction, overlapping the set of active region layout patterns, and being located on the second layout level, each of the contact layout patterns of the first set of contact layout patterns being separated from an adjacent contact of the first set of contact layout patterns in the first direction, the first set of contact layout patterns corresponding to fabricating a first set of contacts, the first set of contacts being electrically coupled to the set of active regions; and generating a second set of contact layout patterns extending in the first direction and the second direction, overlapping the first set of contact layout patterns, and being located on a third layout level different from the first layout level and the second layout level, the second set of contact layout patterns corresponding to fabricating a second set of contacts, the second set of contacts being electrically coupled to the first set of contacts; and manufacturing the integrated circuit based on the cell layout design. - View Dependent Claims (19, 20)
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Specification