METHOD OF DEBUGGING A PROCESSOR
First Claim
1. A method for debugging a processor comprising:
- generating a predetermined number of randomized subtests according to a respective template file for each of a plurality of test types;
creating a test library of respective test binaries for each of the plurality of test types;
executing one or more randomly selected subsets of test binaries from the test library, wherein each of the randomly selected subset of test binaries are executed on a number of physical threads of a processor according to a control data structure for each test binary, wherein the executing is performed via startup firmware; and
detecting one or more errors in executing the randomly selected subset of test binaries from the test library.
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Abstract
Methods for debugging a processor based on executing a randomly created and randomly executed executable on a fabricated processor. The executable may execute via startup firmware. By implementing randomization at multiple levels in the testing of the processor, coupled with highly specific test generation constraint rules, highly focused tests on a micro-architectural feature are implemented while at the same time applying a high degree of random permutation in the way it stresses that specific feature. This allows for the detection and diagnosis of errors and bugs in the processor that elude traditional testing methods. The processor Once the errors and bugs are detected and diagnosed, the processor can then be redesigned to no longer produce the anomalies. By eliminating the errors and bugs in the processor, a processor with improved computational efficiency and reliability can be fabricated.
1 Citation
20 Claims
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1. A method for debugging a processor comprising:
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generating a predetermined number of randomized subtests according to a respective template file for each of a plurality of test types; creating a test library of respective test binaries for each of the plurality of test types; executing one or more randomly selected subsets of test binaries from the test library, wherein each of the randomly selected subset of test binaries are executed on a number of physical threads of a processor according to a control data structure for each test binary, wherein the executing is performed via startup firmware; and detecting one or more errors in executing the randomly selected subset of test binaries from the test library. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method for debugging a processor comprising:
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generating a predetermined number of randomized subtests according to a respective template file for each of a plurality of test types; compiling the predetermined number of randomized subtests into a test binary for each of the plurality of test types; creating a test library using the test binaries for each of the plurality of test types; executing one or more randomly selected subsets of test binaries from the test library, wherein each of the randomly selected subset of test binaries are executed on a number of physical threads of a processor according to a control data structure for each test binary, wherein the executing is performed via startup firmware; detecting one or more errors in executing the randomly selected subset of test binaries from the test library; and redesigning the processor based on the detected one or more errors. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification