DISPLAY PANEL AND METHOD FOR ELECTRICALLY-ISOLATING LIGHT EMITTING DIODE IN DISPLAY PANEL

• US 20200135090A1
• Filed: 10/21/2019
• Published: 04/30/2020
• Est. Priority Date: 10/24/2018
• Status: Active Grant

• Current Assignee: LG Display Co., Ltd.
• Original Assignee: LG Display Co., Ltd.
• Inventors: Lee, Shin-Bok
• Granted Patent: US 10,872,559 B2
• Time in Patent Office: Days
• CPC Class Codes: G09G 2300/0443 with several sub-pixels for the same colour in a pixel, not specifically used to display gradations G09G3/364 takes precedence
• CPC Class Codes: G09G 2300/0809 Several active elements per pixel in active matrix panels
• CPC Class Codes: G09G 2300/0814 used for selection purposes, e.g. logical AND for partial update
• CPC Class Codes: G09G 2310/0267 Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
• CPC Class Codes: G09G 2310/0275 Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current
• CPC Class Codes: G09G 2330/08 Fault-tolerant or redundant circuits, or circuits in which repair of defects is prepared
• CPC Class Codes: G09G 2330/10 Dealing with defective pixels
• CPC Class Codes: G09G 3/006 Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309
• CPC Class Codes: G09G 3/32 semiconductive, e.g. using light-emitting diodes [LED]
• CPC Class Codes: G09G 3/3225 using an active matrix
• CPC Class Codes: H01L 23/5256 comprising fuses, i.e. connections having their state changed from conductive to non-conductive

Abstract

The present disclosure relates to a display panel and a method for electrical-isolation of a light-emitting diode in the display panel. In one embodiment, a display panel includes an element region contained in each sub-pixel, wherein two or more light-emitting diodes are arranged in the element region; and two or more e-fuses respectively connected to the two or more light-emitting diodes, wherein at least one of the two or more e-fuses has blown; and two or more e-fuse transistors respectively connected to the two or more e-fuses.

Claims

1. A display panel, comprising:

sub-pixels including driving transistors for driving light-emitting diodes;

scan signal lines and light-emission control signal lines connected to the sub-pixels respectively and extending in a first direction of the display panel;

data lines connected to the sub-pixels respectively and extending in a second direction of the display panel, the second direction being transverse to the first direction;

element regions, wherein each sub-pixel has each element region, wherein at least two light-emitting diodes are arranged in each element region;

a plurality of e-fuses, wherein at least two e-fuses are arranged in each element region and are connected to the at least two light-emitting diodes respectively, wherein at least one of the at least two e-fuses has blown; and

a plurality of e-fuse transistor, wherein at least two e-fuse transistors are connected to the at least two e-fuses respectively,

wherein a gate node of each e-fuse transistor is connected to one of the scan signal line or the light-emission control signal line or optionally an e-fuse scan signal line extending in the first direction; and

wherein all of source nodes of the two or more e-fuse transistors are connected to the signal line extending in the second direction.

2. The display panel of claim 1, wherein two light-emitting diodes are placed in each element region,

wherein a first light-emitting diode of the two light-emitting diodes is electrically connected to a first e-fuse transistor and a first e-fuse,

wherein a second light-emitting diode of the two light-emitting diodes is electrically connected to a second e-fuse transistor and a second e-fuse,

wherein a gate node of the first e-fuse transistor is electrically connected to the scan signal line, and

wherein a gate node of the second e-fuse transistor is electrically connected to the light-emission control signal line.

3. The display panel of claim 2, wherein a fusing transistor is placed in each sub-pixel,

wherein an e-fuse control signal line extends in the first direction that is connected to a gate node of the fusing transistor,

wherein a source node of the fusing transistor is connected to the data line, and

wherein a drain node of the fusing transistor is connected to source nodes of the first and second e-fuse transistors.

4. The display panel of claim 2, wherein either the first e-fuse or the second e-fuse is blown.

5. The display panel of claim 1, wherein a non-blowing e-fuse contains a first portion of the e-fuse having a narrower width than a second portion adjacent to the first portion.

6. The display panel of claim 1, wherein each element region has a spare region in which one light-emitting diode is to be disposed.

7. The display panel of claim 6, wherein the spare region is currently free of a light-emitting diode, wherein either the first e-fuse or the second e-fuse has blown.

8. The display panel of claim 6, wherein two light-emitting diodes is placed in each element region, wherein the two light-emitting diodes includes first and second light-emitting diodes, wherein both of a first e-fuse connected to the first light-emitting diode and a second e-fuse connected to the second light-emitting diode have blown, wherein a light-emitting diode is disposed in the spare region.

9. The display panel of claim 7, wherein a fusing transistor is placed in each sub-pixel,

wherein an e-fuse control signal line extending in the first direction is connected to a gate node of the fusing transistor,

wherein a source node of the fusing transistor is connected to the data line, and

wherein a drain node of the fusing transistor is connected to source nodes of the first and second e-fuse transistors.

10. The display panel of claim 6, wherein a non-blowing e-fuse contains a first portion of the e-fuse having a narrower dimension than a second portion adjacent to the first portion.

11. A display panel, comprising:

sub-pixels including driving transistors for driving light-emitting diodes;

scan signal lines and light-emission control signal lines connected to the sub-pixels respectively and extending in a first direction of the display panel;

data lines connected to the sub-pixels respectively and extending in a second direction of the display panel, the second direction being transverse to the first direction;

element regions, wherein each sub-pixel has each element region, wherein N light-emitting diodes are arranged in each element region;

a plurality of e-fuses, wherein N e-fuses are arranged in each element region and are connected to the N light-emitting diodes respectively, wherein N-1 of the at N e-fuses have blown; and

a plurality of e-fuse transistor, wherein N e-fuse transistors are connected to the N e-fuses respectively,

wherein a gate node of each e-fuse transistor is connected to one of the scan signal line or the light-emission control signal line or optionally an e-fuse scan signal line extending in the first direction;

wherein all of source nodes of the two or more e-fuse transistors are connected to the signal line extending in the second direction; and

wherein N is a natural number.

12. The display panel of claim 11, wherein N is three, wherein the three light-emitting diodes include first, second, and third light-emitting diodes,

wherein the first light-emitting diode is electrically connected to a first e-fuse transistor and a first e-fuse,

wherein the second light-emitting diode is electrically connected to a second e-fuse transistor and a second e-fuse,

wherein the third light-emitting diode is electrically connected to a third e-fuse transistor and a third e-fuse,

wherein a gate node of the first e-fuse transistor is electrically connected to the scan signal line,

wherein a gate node of the second e-fuse transistor is electrically connected to the light-emission control signal line, and

wherein a gate node of the third e-fuse transistor is electrically connected to the e-fuse scan signal line.

13. The display panel of claim 11, wherein a non-blowing e-fuse contains a first portion of the e-fuse that has narrower dimension than a second portion adjacent to the first portion.

14. A method for electrically-isolating a light-emitting diode in a display panel, the method comprising:

reading, by a timing controller, a readout information about a light-emitting diode to be electrically-isolated among a plurality of light-emitting diodes in each sub-pixel;

applying, by the timing controller, a signal to either a first scan signal line, a first light-emission control signal line, or an e-fuse scan signal line based on the readout information to turn on an e-fuse transistor corresponding to the light-emission diode to be electrically-isolated; and

applying, by the timing controller, a signal for blowing an e-fuse connected to the e-fuse transistor to a signal line connected to a source node of the e-fuse transistor, thereby to blow the e-fuse.

15. The method of claim 14, wherein the method further comprises:

when a first group of light-emitting diodes to be electrically-isolated in sub-pixels connected to the first scan signal line, and a second group of light-emitting diodes to be electrically-isolated in sub-pixels connected to a second scan signal line are disposed in sub-pixels connected to a same data, simultaneously electrically-isolating, by the timing controller, the first and second groups of light-emitting diodes.