GATE DRIVER, DISPLAY APPARATUS INCLUDING THE SAME AND METHOD OF DRIVING DISPLAY PANEL USING THE SAME

• US 20200135129A1
• Filed: 11/18/2019
• Published: 04/30/2020
• Est. Priority Date: 08/05/2014
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: SIM, Jong-Hyun, LEE, Neung-Beom, KWAG, Dong-Joon, KIM, Soo-Yeon, KIM, Jeong-Hyun, WON, Hyeon-Uk, LEE, Ji-Ye, HWANG, Hyeon-Woo
• Granted Patent: US 11,094,276 B2
• Time in Patent Office: Days
• CPC Class Codes: G09G 2310/0286 Details of a shift registers arranged for use in a driving circuit
• CPC Class Codes: G09G 2320/0219 Reducing feedthrough effects in active matrix panels, i.e. voltage changes on the scan electrode influencing the pixel voltage due to capacitive coupling
• CPC Class Codes: G09G 2320/0223 Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
• CPC Class Codes: G09G 3/3674 Details of drivers for scan electrodes

Abstract

A gate driver includes a gate signal generating part, a switching part and a switching controlling part. The gate signal generating part is configured to generate a gate signal including a precharge time and a normal charge time using a compensated gate on voltage and a gate off voltage. The switching part is disposed between the gate signal generating part and a gate line. The switching part is configured to apply a compensated gate signal to the gate line. The switching controlling part is configured to generate a switching control signal for controlling an operation of the switching part.

Claims

1. A display apparatus comprising:

a display panel comprising a gate line and a data line and configured to display an image;

a power voltage generator configured to generate a compensated gate on voltage and a gate off voltage;

a gate driver comprising a gate signal generating part configured to generate a gate signal including a precharge time and a normal charge time using the compensated gate on voltage and the gate off voltage, a switching part disposed between the gate signal generating part and the gate line and configured to apply a compensated gate signal to the gate line and a switching controlling part configured to generate a switching control signal for controlling an operation of the switching part; and

a data driver configured to generate a data voltage and to apply the data voltage to the data line.

2. The display apparatus of claim 1, wherein the switching part is configured to prevent a voltage drop of the compensated gate on voltage from being applied to the compensated gate signal in the precharge time, and

the switching part is configured to allow the voltage drop of the compensated gate on voltage to be applied to the compensated gate signal in the normal charge time.

3. The display apparatus of claim 1, wherein the switching part comprises:

a first switch and a first diode connected in parallel between the gate signal generating part and the gate line.

4. The display apparatus of claim 1, wherein the switching part comprises:

a first diode; and

a path selector configured to connect one of first and second gate lines to the first diode.

5. The display apparatus of claim 1, wherein the compensated gate on voltage has a gate on voltage level which is a DC voltage and gradually decreases from the gate on voltage level corresponding to a kick back compensation signal.

6. The display apparatus of claim 5, wherein the power voltage generator comprises:

a first transistor comprising a control electrode to which a first kick back compensation signal is applied, an input electrode to which the gate on voltage is applied and an output electrode connected to an output terminal which outputs the compensated gate on voltage; and

a second transistor comprising a control electrode to which a second kick back compensation signal is applied, an input electrode connected to the output terminal and an output electrode to which a kick back low voltage having a kick back compensation voltage less than the gate on voltage is applied,

wherein the first kick back compensation signal is an inverted signal of the second kick back compensation signal.

7. A method of driving a display panel, the method comprising:

generating a compensated gate on voltage and a gate off voltage;

generating a gate signal including a precharge time and a normal charge time using the compensated gate on voltage and the gate off voltage;

applying a compensated gate signal to a gate line using a switching part disposed between a gate signal generating part and the gate line; and

generating a data voltage and applying the data voltage to the data line.

8. The method of claim 7, wherein the switching part is configured to prevent a voltage drop of the compensated gate on voltage from being applied to the compensated gate signal in the precharge time, and

the switching part is configured to allow the voltage drop of the compensated gate on voltage to be applied to the compensated gate signal in the normal charge time.

9. The method of claim 7, wherein the compensated gate on voltage has a gate on voltage level which is a DC voltage and gradually decreases from the gate on voltage level corresponding to a kick back compensation signal.