STORAGE DEVICE AND STORAGE METHOD

• US 20200135231A1
• Filed: 08/28/2019
• Published: 04/30/2020
• Est. Priority Date: 10/29/2018
• Status: Active Grant

• Current Assignee: Kioxia Corporation
• Original Assignee: Toshiba Memory Corporation (Kioxia Corporation)
• Inventors: HARADA, Kohsuke
• Granted Patent: US 10,714,124 B2
• Time in Patent Office: Days
• CPC Class Codes: G11B 20/10268 bit detection or demodulation methods
• CPC Class Codes: G11B 20/1217 on discs
• CPC Class Codes: G11B 20/1403 characterised by the use of two levels
• CPC Class Codes: G11B 2020/1292 Enhancement of the total storage capacity
• CPC Class Codes: G11B 5/09 Digital recording

Abstract

according to one embodiment, in a storage device, a selection circuit selects one mapping rule from a plurality of mapping rules in which each of bit labels having a bit length of (n+1) or more is mapped to n M-ary symbols, when M is defined as an integer of 3 or more and n is defined as an integer of or more. A first conversion circuit converts a data block in data into an M-ary symbol sequence using the selected one mapping rule. A second conversion circuit converts the converted M-ary symbol sequence into an M-step pulse width signal. The recording medium records the converted M-step pulse width signal. A readback circuit equalizes the signal read from the recording medium to the M-ary symbol sequence and restores the data.

Claims

1. A storage device comprising:

a selection circuit that selects one mapping rule from a plurality of mapping rules in which each of bit labels having a bit length of (n+1) or more is mapped to n M-ary symbols, when M is defined as an integer of 3 or more and n is defined as an integer of 2 or more;

a first conversion circuit that converts a data block in data into an M-ary symbol sequence using the selected one mapping rule;

a second conversion circuit that converts the converted M-ary symbol sequence into an M-step pulse width signal;

a recording medium that records converted M-step pulse width signal; and

a readback circuit that equalizes the signal read from the recording medium to the M-ary symbol sequence and restores the data.

2. The storage device according to claim 1, wherein

the data includes

a first data block, and

a second data block subsequent to the first data block,

the first conversion circuit converts the first data block into a first symbol sequence, using the selected one mapping rule,

the selection circuit selects one mapping rule to be used in the second data block from the plurality of mapping rules, according to a termination pattern of the first symbol sequence, and

the first conversion circuit converts the second data block into a second symbol sequence, using one mapping rule selected according to the termination pattern of the first symbol sequence.

3. The storage device according to claim 2, further comprising:

a buff circuit that holds the first symbol sequence converted by the first conversion circuit, wherein

the selection circuit selects one mapping rule to be used in the second data block from the plurality of mapping rules, according to the termination pattern of the first symbol sequence held by the buffer circuit.

4. The storage device according to claim 2, wherein

the plurality of mapping rules have a first mapping rule in which a bit label is mapped to a symbol sequence of a first start pattern and a second mapping rule in which a bit label is mapped to a symbol sequence of a second start pattern.

5. The storage device according to claim 1, wherein

the data includes

a first data block, and

a second data block subsequent to the first data block,

the first conversion circuit converts the first data block into a first symbol sequence, using the selected one mapping rule,

the selection circuit selects one mapping rule to be used in the second data block from the plurality of mapping rules, according to a termination pattern of the first symbol sequence and a value of a least significant bit of the second data block, and

the first conversion circuit converts the second data block into a second symbol sequence, using one mapping rule selected according to the termination pattern of the first symbol sequence and the value of the least significant bit of the second data block.

6. The storage device according to claim 5, further comprising:

a buffer circuit that holds the first symbol sequence converted by the first conversion circuit, wherein

the selection circuit selects one mapping rule to be used in the second data block from the plurality of mapping rules, according to the termination pattern of the first symbol sequence held by the buffer circuit and the value of the least significant bit of the second data block.

7. The storage device according to claim 5, wherein

the plurality of mapping rules have

a first mapping rule in which a first bit label is mapped to a symbol sequence of a first start pattern and a second bit label is mapped to a symbol sequence of a second start pattern, and

a second mapping rule in which the first bit label is mapped to the symbol sequence of the second start pattern and the second bit label is mapped to the symbol sequence of the first start pattern.

8. The storage device according to claim 1, wherein

the signal read from the recording medium includes

a first signal block,

a second signal block subsequent to the first signal block, and

a third signal block subsequent to the second signal block, and

the readback circuit equalizes each of the first signal block, the second signal block, and the third signal block to each symbol sequence included in the plurality of mapping rules, estimates a mapping rule to be used in the second signal block, according to an equalization result of the first signal block and an equalization result of the third signal block, and restores data according to an equalization result of the second signal block, using the estimated mapping rule.

9. The storage device according to claim 6, wherein

the readback circuit has

a soft decision circuit that generates likelihood information of each symbol sequence of the plurality of mapping rules for each of the first signal block, the second signal block, and the third signal block,

an operation circuit that obtains likelihood of a termination pattern of the first signal block on the basis of the likelihood information of the first signal block, obtains likelihood of a mapping rule to be used in the third signal block on the basis of the likelihood information of the third signal block, and obtains combined likelihood information of the second signal block in which the likelihood of the termination pattern of the first signal block and the likelihood of the mapping rule to be used in the third signal block are combined, for each symbol sequence of the plurality of mapping rules,

an estimation circuit that estimates a mapping rule to be used in the second signal block, according to the combined likelihood information of each symbol sequence of the plurality of mapping rules, and

a restoration circuit that restores data according to the combined likelihood information, using the estimated mapping rule.

10. The storage device according to claim 9, wherein

the operation circuit temporarily obtains the likelihood of the termination pattern of the first signal block, maintains or changes the temporarily obtained likelihood according to a value of a least significant bit of a bit label corresponding to a termination pattern used for temporarily obtaining the likelihood, and obtains the likelihood of the termination pattern of the first signal block.

11. A storage method comprising:

selecting one mapping rule from a plurality of mapping rules in which each of bit labels having a bit length of (n+1) or more is mapped to n M-ary symbols, when M is defined as an integer of 3 or more and n is defined as an integer of 2 or more;

converting a data block in data into an M-ary symbol sequence using the selected one mapping rule;

converting the converted M-ary symbol sequence into an M-step pulse width signal;

recording the converted M-step pulse width signal on a recording medium; and

equalizing the signal read from the recording medium to the M-ary symbol sequence and restoring the data.

12. The storage method according to claim 11, wherein

the data includes

a first data block, and

a second data block subsequent to the first data block,

the converting into the M-ary symbol sequence includes

converting the first data block into a first symbol sequence, using the selected one mapping rule,

the selecting includes

selecting one mapping rule to be used in the second data block from the plurality of mapping rules, according to a termination pattern of the first symbol sequence, and

the converting into the M-ary symbol sequence further includes

converting the second data block into a second symbol sequence, using one mapping rule selected according to the termination pattern of the first symbol sequence.

13. The storage method according to claim 12, further comprising:

holding the converted first symbol sequence, wherein

the selecting includes

selecting one mapping rule to be used in the second data block from the plurality of mapping rules, according to the termination pattern of the held first symbol sequence.

14. The storage device according to claim 12, wherein

the plurality of mapping rules have

a first mapping rule in which a bit label is mapped to a symbol sequence of a first start pattern and

a second mapping rule in which a bit label is mapped to a symbol sequence of a second start pattern.

15. The storage method according to claim 11, wherein

the data includes

a first data block, and

a second data block subsequent to the first data block,

the converting into the M-ary symbol sequence includes

converting the first data block into a first symbol sequence, using the selected one mapping rule,

the selecting includes

selecting one mapping rule to be used in the second data block from the plurality of mapping rules, according to a termination pattern of the first symbol sequence and a value of a least significant bit of the second data block, and

the converting into the M-ary symbol sequence further includes

converting the second data block into a second symbol sequence, using one mapping rule selected according to the termination pattern of the first symbol sequence and the value of the least significant bit of the second data block.

16. The storage method according to claim 15, further comprising:

holding the converted first symbol sequence, wherein

the selecting includes

selecting one mapping rule to he used in the second data block from the plurality of mapping rules, according to the termination pattern of the held first symbol sequence and the value of the least significant bit of the second data block.

17. The storage device according to claim 15, wherein

the plurality of mapping rules have

a first mapping rule in which a first bit label is mapped to a symbol sequence of a first start pattern and a second bit label is mapped to a symbol sequence of a second start pattern, and

a second mapping rule in which the first bit label is mapped to the symbol sequence of the second start pattern and the second bit label is mapped to the symbol sequence of the first start pattern.

18. The storage method according to claim 11, wherein

the signal read from the recording medium includes

a first signal block,

a second signal block subsequent to the first signal block, and

a third signal block subsequent to the second signal block, and

the restoring includes

equalizing each of the first signal block, the second signal block, and the third signal block to each symbol sequence included in the plurality of mapping rules, estimating a mapping rule to be used in the second signal block, according to an equalization result of the first signal block and an equalization result of the third signal block, and restoring data according to an equalization result of the second signal block, using the estimated mapping rule.

19. The storage method according to claim 18, wherein

the equalizing each of the first signal block, the second signal block, and the third signal block to each symbol sequence included in the plurality of mapping rules, estimating the mapping rule to be used in the second signal block, according to the equalization result of the first signal block and the equalization result of the third signal block, and restoring the data according to the equalization result of the second signal block, using the estimated mapping rule includes:

generating likelihood information of each symbol sequence of the plurality of mapping rules for each of the first signal block, the second signal block, and the third signal block;

obtaining likelihood of a termination pattern of the first signal block on the basis of the likelihood information of the first signal block, obtaining likelihood of a mapping rule to be used in the third signal block on the basis of the likelihood information of the third signal block, and obtaining combined likelihood information of the second signal block in which the likelihood of the termination pattern of the first signal block and the likelihood of the mapping rule to be used in the third signal block are combined, for each symbol sequence of the plurality of mapping rules;

estimating a mapping rule to be used in the second signal block, according to the combined likelihood information of each symbol sequence of the plurality of mapping rules; and

restoring data according to the combined likelihood information, using the estimated mapping rule.

20. The storage method according to claim 19, wherein

the obtaining the likelihood of the termination pattern of the first signal block includes:

temporarily obtaining the likelihood of the termination pattern of the first signal block; and

maintaining or changing the temporarily obtained likelihood, according to a value of a least significant bit of a bit label corresponding to a termination pattern used for temporarily obtaining the likelihood, and obtaining the likelihood of the termination pattern of the first signal block.