APPARATUSES AND METHODS FOR ACCESS BASED REFRESH TIMING
First Claim
1. An apparatus comprising:
- a memory bank comprising word lines;
a row decoder configured to access a word line of the memory bank based on a received access address, and to refresh a word line of the memory bank based on a received refresh address;
an auto-refresh address generator configured to provide an auto-refresh address;
a targeted refresh address generator configured to provide a targeted refresh address; and
a cycle generator configured to determine if the auto-refresh address or the targeted refresh address is provided to the memory bank as the refresh address based on a count of the accesses to the memory bank.
5 Assignments
0 Petitions
Accused Products
Abstract
Embodiments of the disclosure are drawn to apparatuses and methods for scheduling targeted refreshes in a memory device. Memory cells in a memory device may be volatile and may need to be periodically refreshed as part of an auto-refresh operation. In addition, certain rows may experience faster degradation, and may need to undergo targeted refresh operations, where a specific targeted refresh address is provided and refreshed. The rate at which targeted refresh operations need to occur may be based on the rate at which memory cells are accessed. The memory device may monitor accesses to a bank of the memory, and may use a count of the accesses to determine if an auto-refresh address or a targeted refresh address will be refreshed.
-
Citations
20 Claims
-
1. An apparatus comprising:
-
a memory bank comprising word lines; a row decoder configured to access a word line of the memory bank based on a received access address, and to refresh a word line of the memory bank based on a received refresh address; an auto-refresh address generator configured to provide an auto-refresh address; a targeted refresh address generator configured to provide a targeted refresh address; and a cycle generator configured to determine if the auto-refresh address or the targeted refresh address is provided to the memory bank as the refresh address based on a count of the accesses to the memory bank. - View Dependent Claims (2, 3, 4, 5, 6, 7)
-
-
8. An apparatus comprising:
-
a counter circuit configured to count a number of accesses to each of a plurality of memory banks; and a comparator circuit configured to provide a command signal if the count of the accesses for a given memory bank exceeds a threshold, wherein a targeted refresh address is issued to the given memory bank based on the command signal. - View Dependent Claims (9, 10, 11, 12, 13, 14)
-
-
15. A method comprising:
-
monitoring accesses to a memory bank; providing refresh addresses to the memory bank over time; and providing a targeted refresh address as one of the refresh addresses based on the monitored accesses to the bank. - View Dependent Claims (16, 17, 18, 19, 20)
-
Specification