EVENT COUNTERS FOR MEMORY OPERATIONS

• US 20200135276A1
• Filed: 10/24/2018
• Published: 04/30/2020
• Est. Priority Date: 10/24/2018
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Sforzin, Marco, Di Vincenzo, Umberto
• Granted Patent: US 10,714,185 B2
• Time in Patent Office: Days
• CPC Class Codes: G11C 11/24 using capacitors G11C11/22 takes precedence; using a combination of semiconductor devices and capacitors G11C11/34, e.g. G11C11/40
• CPC Class Codes: G11C 11/4045 using a plurality of serially connected access transistors, each having a storage capacitor
• CPC Class Codes: G11C 11/5678 using amorphous/crystalline phase transition storage elements
• CPC Class Codes: G11C 13/0038 Power supply circuits
• CPC Class Codes: G11C 16/12 Programming voltage switching circuits
• CPC Class Codes: G11C 16/28 using differential sensing or reference cells, e.g. dummy cells
• CPC Class Codes: G11C 2207/068 Integrator type sense amplifier
• CPC Class Codes: G11C 2213/71 Three dimensional array
• CPC Class Codes: G11C 2213/77 Array wherein the memory element being directly connected to the bit lines and word lines without any access device being used
• CPC Class Codes: G11C 7/062 Differential amplifiers of non-latching type, e.g. comparators, long-tailed pairs
• CPC Class Codes: G11C 7/1006 Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
• CPC Class Codes: G11C 7/14 Dummy cell management; Sense reference voltage generators
• CPC Class Codes: H03K 25/02 comprising charge storage, e.g. capacitor without polarisation hysteresis

Abstract

A counter can have a number of sensing components. Each respective sensing component can be configured to sense a respective event and can include a respective first capacitor configured to be selectively coupled to a second capacitor in response to the respective sensing component sensing the respective event. The second capacitor can be configured to be charged to a voltage by each respective first capacitor that is selectively coupled to the second capacitor. The counter can have a comparator with a first input coupled to the second capacitor and a second input coupled to a reference voltage corresponding to a threshold quantity of events. The comparator can be configured to output a signal indicative of the threshold quantity of events being sensed in response to the voltage of the second capacitor being greater than or equal to the reference voltage.

Claims

1. A counter, comprising:

a plurality of sensing components, each respective sensing component configured to sense a respective event and comprising a respective first capacitor configured to be selectively coupled to a second capacitor in response to the respective sensing component sensing the respective event, wherein the second capacitor is configured to be charged to a voltage by each respective first capacitor that is selectively coupled to the second capacitor; and

a comparator comprising a first input coupled to the second capacitor and a second input coupled to a reference voltage corresponding to a threshold quantity of events, the comparator configured to output a signal indicative of the threshold quantity of events being sensed in response to the voltage of the second capacitor being greater than or equal to the reference voltage.

2. The counter of claim 1, wherein each respective first capacitor is configured to be selectively coupled in parallel to the second capacitor in response to the respective sensing component sensing the respective event.

3. The counter of claim 1, further comprising a plurality of branches coupled in parallel to a node that is coupled to the second capacitor through one of the branches, wherein the respective first capacitor of each respective sensing component is configured to be selectively coupled to a respective branch in response to the respective sensing component sensing the respective event.

4. The counter of claim 3, wherein

the second capacitor is one of a plurality of second capacitors, wherein each respective second capacitor is coupled to a respective branch such that the respective second capacitors are in parallel;

and

each respective first capacitor is configured to be selectively coupled in parallel to the plurality of second capacitors in response to the respective sensing component sensing the respective event.

5. The counter of claim 1, wherein

an input of each respective sensing component is coupled to a respective sense amplifier of a group of sense amplifiers coupled to a group of memory cells;

and

each respective event is a switching event experienced by a respective memory cell of the group coupled to the respective sense amplifier.

6. The counter of claim 5, wherein the threshold quantity of events corresponds to a weight of a data pattern stored in the group of memory cells.

7. A method of counting, comprising:

receiving a respective first voltage indicative of a respective event at each respective sensing component of a number of sensing components of a counter, each respective sensing component comprising a respective first capacitor initially charged to a second voltage;

coupling each respective first capacitor in parallel with a second capacitor of the counter in response to each respective sensing component receiving the respective first voltage so that each respective first capacitor discharges into the second capacitor until each respective first capacitor and the second capacitor reach a third voltage; and

comparing the third voltage to a reference voltage by a comparator to determine whether the number of sensing components receiving the respective first voltage is greater than or equal to a threshold quantity.

8. The method of claim 7, further comprising outputting a signal by the comparator in response to the third voltage being greater than or equal to the reference voltage to indicate that the number of sensing components receiving the respective first voltage is greater than or equal to the threshold quantity.

9. The method of claim 7, wherein

the second capacitor is one of a plurality of second capacitors that are coupled in parallel to an input of the comparator and that are coupled in parallel with each respective first capacitor in response to each respective sensing component receiving the respective first voltage so that each respective first capacitor discharges into the plurality of second capacitors until each respective first capacitor and the plurality of second capacitors reach the third voltage.

10. The method of claim 9, wherein

the number of sensing components receiving the respective first voltage is a subset of a total number of sensing components of the counter;

and

the plurality of second capacitors comprises a number of second capacitors equal to the total number of sensing components of the counter.

11. The method of claim 7, further comprising selectively coupling each respective first capacitor to the second voltage, to charge each respective first capacitor to the second voltage, in response to receiving a respective voltage at each respective sensing component that is not indicative of the respective event.

12. The method of claim 11, further comprising decoupling the second voltage from each respective first capacitor in response to each respective sensing component receiving the respective first voltage.

13. A method of counting, comprising:

receiving a respective first voltage indicative of a respective event at each respective sensing component of a number of sensing components of a counter, each respective sensing component comprising a respective first capacitor initially charged to a second voltage;

transferring a same amount of charge from each respective first capacitor into an initially discharged second capacitor by discharging each respective first capacitor into the second capacitor in response to each respective sensing component receiving the respective first voltage so that the second capacitor is charged to a third voltage; and

comparing the third voltage to a reference voltage by a comparator to determine whether the number of sensing components receiving the respective first voltage is greater than or equal to a threshold quantity.

14. The method of claim 13, wherein the third voltage is directly proportional to the number of sensing components receiving the respective first voltage.

15. The method of claim 13, wherein

each respective first capacitor is coupled to a respective transistor;

and

discharging each respective first capacitor into the second capacitor comprises discharging each respective first capacitor through the respective transistor in response to activating the respective transistor in response to the respective sensing component receiving the respective first voltage.

16. The method of claim 15, wherein

a first terminal of each respective first capacitor is selectively coupled to the respective transistor;

receiving the respective first voltage at each respective sensing component comprises receiving the respective first voltage at a second terminal of the respective first capacitor that acts to increase a fourth voltage on the first terminal by the first voltage to a fifth voltage; and

activating the respective transistor in response to the respective sensing component receiving the respective first voltage comprises activating the respective transistor in response to the fifth voltage.

17. The method of claim 16, wherein

discharging each respective first capacitor into the discharged second capacitor comprises discharging the respective first capacitor through the respective transistor until the voltage at the first terminal of the respective first capacitor is returned to the fourth voltage.

18. The method of claim 17, wherein returning the first terminal of the respective first capacitor to the fourth voltage deactivates the respective transistor.

19. A counter, comprising:

a plurality of sensing components; and

a number of first capacitors;

wherein each respective sensing component comprises;

a second capacitor;

a transistor coupled to a respective input of the respective sensing component, the transistor configured to selectively couple the second capacitor in parallel with the number of first capacitors in response to the respective input receiving a voltage indicative of a switching event;

wherein each of a number of second capacitors coupled in parallel with the number of first capacitors is configured to discharge into the number of first capacitors until each of the number of first capacitors and each of the number of second capacitors reach an equilibrium voltage.

20. The counter of claim 19, further comprising:

a comparator comprising a first input coupled to the number of first capacitors to receive the equilibrium voltage; and

a second input coupled to a node between a third and a fourth capacitor coupled in series between a voltage equal to the voltage indicative of a switching event and ground.

21. The counter of claim 19, wherein each respective sensing component comprises an additional transistor coupled to the respective input of the respective sensing component, the additional transistor configured to selectively couple the second capacitor to a charging voltage in response to the respective input receiving a voltage not indicative of the switching event.

22. A counter, comprising:

a plurality of sensing components;

a first capacitor; and

a respective transistor coupled between each respective sensing component and the first capacitor;

wherein each respective sensing component comprises;

a respective second capacitor;

a respective first switch configured to selectively couple a first terminal of the respective second capacitor to the respective transistor; and

a respective second switch configured to selectively couple a second terminal of the respective second capacitor to a first voltage indicative of a switching event in response to the respective sensing component receiving the first voltage;

wherein each respective transistor is configured to conduct in response to the first voltage being coupled to the first terminal of the respective second capacitor until a same charge corresponding to the first voltage is transferred from each respective second capacitor to the first capacitor so that the first capacitor is charged to a second voltage corresponding to the charge transferred to the first capacitor, the second voltage directly proportional to a number of respective sensing components receiving the first voltage.

23. The counter of claim 22, wherein the transistors are p-channel transistors.

24. The counter of claim 22, wherein each respective transistor is coupled to a biasing voltage.

25. The counter of claim 22, wherein each respective sensing component further comprises:

a third switch configured to selectively couple the first terminal of the respective second capacitor to a charging voltage; and

a fourth switch configured to selectively couple the second terminal of the respective second capacitor to ground;

wherein the third switch selectively couples the first terminal of the respective second capacitor to the charging voltage to charge the respective second capacitor to the charging voltage while the fourth switch selectively couples the second terminal of the respective second capacitor to ground.

26. The counter of claim 25, wherein

the first switch is configured to selectively couple the charging voltage to a source of the respective transistor;

the counter further comprises a fifth switch configured to couple a drain of the respective transistor to ground;

the respective transistor is configured to conduct to ground through the fifth switch in response to the charging voltage until source reaches a voltage equal to a threshold voltage of the respective transistor plus a bias voltage placed on the respective transistor to initialize the respective transistor in a non-conductive state.