BACK-END-OF-THE LINE CAPACITOR

• US 20200135407A1
• Filed: 10/29/2019
• Published: 04/30/2020
• Est. Priority Date: 09/27/2018
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Yang, Chih-Chao
• Granted Patent: US 10,685,784 B2
• Time in Patent Office: Days
• CPC Class Codes: H01G 4/005 Electrodes
• CPC Class Codes: H01G 4/008 Selection of materials
• CPC Class Codes: H01G 4/018 Dielectrics
• CPC Class Codes: H01G 4/224 Housing; Encapsulation
• CPC Class Codes: H01G 4/30 Stacked capacitors H01G4/33 takes precedence
• CPC Class Codes: H01G 4/33 Thin- or thick-film capacitors thin- or thick-film circuits H01L27/00; capacitors without a potential-jump or surface barrier specially adapted for integrated circuits, details thereof, multistep manufacturing processes therefor H01L28/40
• CPC Class Codes: H01L 23/5223 Capacitor integral with wiring layers
• CPC Class Codes: H01L 28/40 Capacitors
• CPC Class Codes: H01L 28/65 comprising a noble metal or a noble metal oxide, e.g. platinum (Pt), ruthenium (Ru), ruthenium dioxide (RuO2), iridium (Ir), iridium dioxide (IrO2)

Abstract

A back-end-of-the-line (BEOL) metal-insulator-metal (MIM) capacitor is provided that includes three electrode plates in which the first electrode plate of the MIM capacitor is an electrically conductive interconnect structure embedded in a first interconnect dielectric material layer. The other two electrode plates are located in a second interconnect dielectric material layer that is located above the first interconnect dielectric material layer. A first contact structure is present in the second interconnect dielectric material layer and contacts a surface of the first interconnect dielectric material layer, wherein the first contact structure passes through the second electrode plate. A second contact structure is also present in the second interconnect dielectric material layer and contacts a surface of the first electrode plate, wherein the second contact structure passes through the third electrode plate. Capacitor dielectric materials are located between each of the electrode plates.

Claims

1. A method of forming a back-end-of-the-line (BEOL) metal-insulator-metal (MIM) capacitor, the method comprising:

forming an electrically conductive interconnect structure in a first interconnect dielectric material layer;

forming a patterned capacitor material stack above the electrically conductive interconnect structure and the first interconnect dielectric material layer, wherein the patterned capacitor material stack comprises a first capacitor dielectric material, a first metal-containing material, a second capacitor dielectric material and a second metal-containing material, and wherein the second metal-containing material and the second capacitor dielectric material are located atop and overlap the first metal-containing material and the first capacitor dielectric material;

forming a second interconnect dielectric material layer laterally surrounding, and located above the patterned capacitor material stack; and

forming a first contact structure in the second interconnect dielectric material layer and contacting a surface of the first interconnect dielectric material layer, and a second contact structure in the second interconnect dielectric material layer and contacting a surface of the electrically conductive interconnect structure, wherein the first contact structure passes through first metal-containing material and the first capacitor dielectric material, and the second contact structure passes through second metal-containing material and the second capacitor dielectric material.

2. The method of claim 1, further comprising forming, prior to the forming of the patterned capacitor material stack, a dielectric capping layer on the electrically conductive interconnect structure and the first interconnect dielectric material layer.

3. The method of claim 1, wherein the first capacitor dielectric material has outermost sidewall surfaces that are vertically aligned to outermost sidewall surfaces of the first metal-containing material.

4. The method of claim 3, wherein the second capacitor dielectric material has outermost sidewall surfaces that are vertically aligned to outermost sidewall surfaces of the second metal-containing material.

5. The method of claim 1, wherein the forming of the patterned capacitor material stack comprises:

forming a first capacitor dielectric material layer above the electrically conductive interconnect structure and the first interconnect dielectric material layer;

forming a first metal-containing material layer on the first capacitor dielectric material layer;

patterning the first metal-containing material layer and the first capacitor dielectric material layer to provide a patterned material stack of a remaining portion of the first metal-containing material layer and a remaining portion of the first capacitor dielectric material layer;

forming a second capacitor dielectric material layer on physically exposed surfaces of the patterned material stack;

forming a second metal-containing material layer on the second capacitor dielectric material layer; and

patterning the second metal-containing material layer, the second capacitor dielectric material layer, and the patterned material stack of the first metal-containing material portion and the first capacitor dielectric material portion.

6. The method of claim 1, wherein the first capacitor dielectric material and the second capacitor dielectric material are composed of a same capacitor dielectric material.

7. The method of claim 1, wherein the first capacitor dielectric material and the second capacitor dielectric material are composed of different capacitor dielectric materials.

8. The method of claim 1, wherein each of the first capacitor dielectric material and the second capacitor dielectric material has a surface that directly contacts the electrically conductive structure.

9. The method of claim 1, wherein the first contact structure has a topmost surface that is coplanar with a topmost surface of second contact structure and a topmost surface of the second interconnect dielectric material layer.

10. The method of claim 1, wherein the first capacitor dielectric material is composed of a high-k dielectric material.

11. The method of claim 1, wherein the first metal-containing material is composed of tantalum (Ta), titanium (Ti), tungsten (W), copper (Cu), aluminum (Al), ruthenium (Ru), rhodium (Rh), cobalt (Co), titanium nitride (TiN) or tantalum nitride (TaN).

12. The method of claim 1, wherein the second capacitor dielectric material is composed of a high-k dielectric material.

13. The method of claim 1, wherein the second metal-containing material is composed of tantalum (Ta), titanium (Ti), tungsten (W), copper (Cu), aluminum (Al), ruthenium (Ru), rhodium (Rh), cobalt (Co), titanium nitride (TiN) or tantalum nitride (TaN).

14. The method of claim 1, wherein the patterned capacitor material stack further includes alternating layers of a capacitor dielectric material and a metal-containing material located on the second metal-containing material.

15. The method of claim 1, wherein the electrically conductive interconnect structure is composed of copper (Cu), aluminum (Al), tungsten (W), cobalt (Co) or alloys thereof.

16. The method of claim 1, wherein the first contact structure and the second contact structure are composed of copper (Cu), aluminum (Al), tungsten (W), cobalt (Co) or alloys thereof.

17. The method of claim 1, wherein the forming of the first contact structure and the second contact structure comprises:

forming, by lithography and etching, a first contact opening in the second interconnect dielectric material that physically exposes the first interconnect dielectric material layer, and a second contact opening in the second interconnect dielectric material layer that physically exposes the electrically conductive structure; and

forming a layer of an electrically conductive metal or electrically conductive metal alloy on the second interconnect dielectric material layer and in both the first contact opening and the second contact opening;

removing, by planarization, the layer of electrically conductive metal or electrically conductive metal alloy that is located on the second interconnect dielectric material layer, while maintaining the layer of electrically conductive metal or electrically conductive metal alloy in both the first contact opening and the second contact opening.

18. The method of claim 17, further comprising forming, prior to forming the layer of electrically conductive metal or electrically conductive metal alloy, a diffusion barrier material layer on the second interconnect dielectric material and in both the first contact opening and the second contact opening, and wherein the diffusion barrier material layer that is located on the second interconnect dielectric material is removed during the planarization, while the layer of diffusion barrier material is maintaining in both the first contact opening and the second contact opening.