SEMICONDUCTOR DEVICE AND METHOD

• US 20200135462A1
• Filed: 09/26/2019
• Published: 04/30/2020
• Est. Priority Date: 10/31/2018
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Chang, Ching-Yu, Shiu, Jung-Hau, Wang, Jen Hung, Lee, Tze-Liang
• Granted Patent: US 11,069,528 B2
• Time in Patent Office: Days
• CPC Class Codes: H01L 21/02167 the material being a silicon carbide not containing oxygen, e.g. SiC, SiC:H or silicon carbonitrides H01L21/02126 and H01L21/0214 take precedence
• CPC Class Codes: H01L 21/02211 the compound being a silane, e.g. disilane, methylsilane or chlorosilane
• CPC Class Codes: H01L 21/02214 the compound comprising silicon and oxygen
• CPC Class Codes: H01L 21/0228 deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
• CPC Class Codes: H01L 21/0331 for lift-off processes
• CPC Class Codes: H01L 21/0337 characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
• CPC Class Codes: H01L 21/31144 using masks
• CPC Class Codes: H01L 21/32133 by chemical means only
• CPC Class Codes: H01L 21/32139 using masks
• CPC Class Codes: H01L 29/66795 with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET

Abstract

A method for manufacturing an integrated circuit includes patterning a plurality of photomask layers over a substrate, partially backfilling the patterned plurality of photomask layers with a first material using atomic layer deposition, completely backfilling the patterned plurality of photomask layers with a second material using atomic layer deposition, removing the plurality of photomask layers to form a masking structure comprising at least one of the first and second materials, and transferring a pattern formed by the masking structure to the substrate and removing the masking structure. The first material includes a silicon dioxide, silicon carbide, or carbon material, and the second material includes a metal oxide or metal nitride material.

Claims

1. A method for manufacturing an integrated circuit comprising:

forming an opening within a mask over a hard mask material;

depositing a first gap-filling material along sidewalls of the opening;

depositing a second gap-filling material within the opening, the second gap-filling material being different from the first gap-filling material, the second gap-filling material comprising a metal oxide or a metal nitride;

removing the mask;

etching the first gap-filling material; and

patterning the hard mask material using the second gap-filling material as a mask.

2. The method of claim 1, wherein the etching the first gap-filling material fully removes the first gap-filling material.

3. The method of claim 1, wherein the etching the first gap-filling material reduces a thickness of the first gap-filling material.

4. The method of claim 1, wherein the depositing the first gap-filling material covers the hard mask material exposed by the opening.

5. The method of claim 4, wherein the depositing the first gap-filling material is performed at least in part with an atomic layer deposition process.

6. The method of claim 1, wherein the depositing the first gap-filling material does not fully cover the hard mask material exposed by the opening.

7. The method of claim 1, wherein the hard mask material comprises titanium oxide.

8. A method for manufacturing an integrated circuit comprising:

forming a plurality of dielectric layers over a substrate;

forming a photomask layer on the plurality of dielectric layers;

patterning the photomask layer to form a gap therethrough;

partially gap-filling the gap with a first material;

gap-filling the gap with a second material different from the first material, the second material comprising a metal oxide or a metal nitride;

removing the photomask layer and at least a portion of the first material to form a masking structure comprising the second material;

transferring a pattern formed by the masking structure to the plurality of dielectric layers and removing the masking structure; and

transferring a pattern formed by the plurality of dielectric layers to the substrate.

9. The method of claim 8, wherein the removing the photomask layer and the at least a portion of the first material removes all of the first material.

10. The method of claim 8, wherein the removing the photomask layer and the at least a portion of the first material leaves a portion of the first material adjacent to the second material.

11. The method of claim 8, wherein the partially gap-filling the gap with the first material comprises partially filling the gap with SiO_x, SiC_xO_y, SiC or a-C (amorphous carbon).

12. The method of claim 11, wherein the gap-filling the gap with the second material comprises gap-filling with TiO, Al₂O₃, or TiN.

13. The method of claim 8, wherein the partially gap-filling the gap with the first material is performed at least in part using an atomic layer deposition process with a first precursor comprising tris(dimethylamino)silane (3DMAS), bis(tertiary-butyl-amino) silane (BTBAS), bis(diethylamino)silane (BDEAS), methane (CH₄) or ethylene (C₂H₄) and acetylene (C₂H₂).

14. The method of claim 13, wherein the atomic layer deposition process uses a second precursor comprising O₂, CO₂, or N₂O.

15. The method of claim 8, wherein the second material is formed at least in part using an atomic layer deposition process with a first precursor comprising trimethylaluminum (TMA, Al(CH₃)₃), diethylzinc (DEZ), tetrakis(dimethylamino)titanium (TDMAT), titanium isopropoxide (TTIP) , TiCl₄ or tetrakis(dimethylamido)zirconium (Zr(NMe₂)₄) or zirconium tetrachloride (ZrCl₄) or tetrakis-dimethyl-amine tin (TDMASn).

16. A method for manufacturing an integrated circuit comprising:

depositing a first material into an opening within a mask layer using at least in part an atomic layer deposition process, the mask layer being over a substrate;

depositing a second material into the opening using at least in part an atomic layer deposition process;

removing the mask layer;

etching a mask layer with the second material as a mask to form a masking structure comprising at least one of the first material and the second material; and

transferring a pattern formed by the masking structure to the substrate and removing the masking structure.

17. The method of claim 16, wherein the substrate comprises a dielectric layer of a metallization layer.

18. The method of claim 17, further comprising depositing a conductive material into a pattern within the dielectric layer of the metallization layer.

19. The method of claim 16, further comprising thinning the first material after the removing the mask layer.

20. The method of claim 16, wherein the first material comprises a silicon dioxide, silicon carbide, or carbon material, and wherein the second material comprises a metal oxide or metal nitride material.