REUSABLE WIDE BANDGAP SEMICONDUCTOR SUBSTRATE

• US 20200135565A1
• Filed: 10/25/2018
• Published: 04/30/2020
• Est. Priority Date: 10/25/2018
• Status: Active Grant

• Current Assignee: United Silicon Carbide, Inc. (Qorvo, Inc.)
• Original Assignee: United Silicon Carbide, Inc. (Qorvo, Inc.)
• Inventors: Bhalla, Anup, Fursin, Leonid
• Granted Patent: US 10,825,733 B2
• Time in Patent Office: Days
• CPC Class Codes: H01L 21/7813 leaving a reusable substrate, e.g. epitaxial lift off
• CPC Class Codes: H01L 24/98 Methods for disconnecting semiconductor or solid-state bodies
• CPC Class Codes: H01L 29/1602 Diamond
• CPC Class Codes: H01L 29/1608 Silicon carbide
• CPC Class Codes: H01L 29/2003 Nitride compounds
• CPC Class Codes: H01L 29/36 characterised by the concentration or distribution of impurities in the bulk material within semiconductor regions H01L29/06
• CPC Class Codes: H01L 2924/10254 Diamond [C]
• CPC Class Codes: H01L 2924/10272 Silicon Carbide [SiC]
• CPC Class Codes: H01L 2924/10323 Aluminium nitride [AlN]
• CPC Class Codes: H01L 2924/10325 Boron nitride [BN], e.g. cubic, hexagonal, nanotube
• CPC Class Codes: H01L 2924/1033 Gallium nitride [GaN]

Abstract

Multiple wide bandgap semiconductor wafers, each having active circuitry and an epitaxially formed backside drain contact layer, may be constructed from a single bulk semiconductor substrate by: forming foundational layers on the top of the bulk substrate via epitaxy; forming active circuitry atop the foundational layers; laser treating the backside of the bulk substrate to create a cleave line in one of the foundational layers; and exfoliating a semiconductor wafer from the bulk substrate, where the exfoliated semiconductor wafer contains the active circuits and at least a portion of the foundational layers. Wafers containing the foundational layers without complete active devices may be produced in a similar manner. The foundational layers may comprise a drain contact layer and a drift layer, and may additionally include a buffer layer between the drain contact layer and the drift layer.

Claims

1. A semiconductor device, comprising, a set of active circuitry layers atop a set of foundation layers, the set of foundation layers comprising a drain contact layer on a backside of the semiconductor device, and a drift layer atop the drain buffer layer, wherein:

each layer of the set of foundation layers comprises a wide bandgap semiconductor material, the wide-bandgap semiconductor material having a bandgap equal to or greater than 2.0 eV;

the drain contact layer has a doping level equal to, or greater than, 1e19/cm3, and wherein the drain contact layer has a dopant activation level higher than 95% within at least 80% of the drain contact layer thickness;

the drain contact layer has highly uniform doping level with less than +/−

10% deviation from the average value within at least 80% of the drain contact layer thickness; and

the total drain contact layer thickness is less than 25 μ

m.

2. The semiconductor device of claim 1, wherein the set of foundation layers further comprises a drain buffer layer between the drain contact layer and the drift layer, the drain buffer layer having a doping level in a range from 1e16/cm3 to 1e19/cm3, and wherein the drain buffer layer has a dopant activation level higher than 95%.

3. The semiconductor device of claim 2, wherein the semiconductor device has a standoff voltage between 50 and 10000 volts.

4. The semiconductor device of claim 2, wherein the semiconductor device has a standoff voltage between 30 and 3300 volts.

5. The semiconductor device of claim 4, wherein the semiconductor device has a thickness from 10 to 120 μ

m.

6. The semiconductor device of claim 4, wherein the semiconductor device has a thickness from 15 to 35 μ

m.

7. The semiconductor device of claim 6, wherein the doping level of the drain contact layer is in a range from 2e19 to 5e19/cm3.

8. The semiconductor device of claim 7, wherein the wide bandgap semiconductor material is silicon carbide, gallium nitride, aluminum nitride, boron nitride, diamond, or gallium oxide.

9. A semiconductor wafer, comprising, a set of foundation layers, the set of foundation layers comprising a drain contact layer on a backside of the substrate, a drain buffer layer atop the drain contact layer, and a drift layer atop the drain buffer layer, wherein:

each layer of the set of foundation layers comprises a wide bandgap semiconductor material, the wide-bandgap semiconductor material having a bandgap equal to or greater than 2.0 eV;

the drain contact layer has a doping level equal to, or greater than, 1e19/cm3, and wherein the drain contact layer has a dopant activation level higher than 95% within at least 80% of the drain contact layer thickness;

the drain contact layer has highly uniform doping level with less than +/−

10% deviation from the average value within at least 80% of the drain contact layer thickness; and

the drain buffer layer has a doping level in a range from 1e16/cm3 to 1e19/cm3, and wherein the drain buffer layer has a dopant activation level higher than 95%.

10. A method of forming a semiconductor substrate, comprising:

epitaxially forming, atop a bulk semiconductor wafer, a set of foundation layers, the set of foundation layers comprising a drain contact layer atop the semiconductor bulk wafer, and a drift layer atop the drain contact layer, wherein;

each layer of the set of foundation layers comprises a wide bandgap semiconductor material, the wide-bandgap semiconductor material having a bandgap equal to or greater than 2.0 eV;

the drain contact layer having a doping level equal to, or greater than, 1e19/cm3; and

the drain contact layer having a dopant activation level higher than 95% within at least 80% of the drain contact layer thickness,

the method further comprising;

creating a cleave line, across the width of the bulk semiconductor wafer and at a controlled depth in the drain contact layer, by applying laser energy to a bottom of the bulk semiconductor wafer; and

exfoliating, along the cleave line, a top portion from the bulk semiconductor wafer, the top portion comprising the drift layer, the drain buffer layer, and a portion of the drain contact layer.

11. The method of claim 10, further comprising, repeating the steps of claim 10 to form one or more additional top portions from the bulk semiconductor wafer.

12. The method of claim 10, wherein:

the set of foundation layers further comprises a drain buffer layer, the drain buffer layer being between the drain contact layer and the drift layer;

the drain buffer layer has a doping level in a range from 1e16/cm3 to 1e19/cm3; and

the drain buffer layer has a dopant activation level higher than 95%.

13. The method of claim 12, further comprising, repeating the steps of claim 12 to form one or more additional top portions from the bulk semiconductor wafer.

14. The method of claim 13, further comprising, adjusting the laser energy for each additional top portion according to a thickness of the bulk semiconductor wafer.

15. The method of claim 12, further comprising, prior to creating the cleave line, forming one or more active semiconductor devices, the active semiconductor devices comprising vertical, horizontal, or hybrid vertical and horizontal field-effect transistors or thyristors comprising portions of the source layer, drift layer, and drain contact layer.

16. The method of claim 15, wherein the wide bandgap semiconductor material is silicon carbide, gallium nitride, aluminum nitride, boron nitride, diamond, or gallium oxide.

17. The method of claim 16, wherein the one or more active semiconductor devices have a standoff voltage between 30 and 3300 volts.

18. The method of claim 17, wherein the active semiconductor device has a thickness from 10 to 120 μ

m.

19. The method of claim 17, wherein the active semiconductor device has a thickness from 15 to 35 μ

m.

20. The method of claim 18, wherein the active doping level of the drain contact layer is in a range from 2e19 to 5e19/cm3.