CHIP PACKAGE STRUCTURE

• US 20200135615A1
• Filed: 12/20/2019
• Published: 04/30/2020
• Est. Priority Date: 06/21/2017
• Status: Abandoned Application

• Current Assignee: Huawei Technologies Co., Ltd. (Huawei Investment & Holding Co., Ltd.)
• Original Assignee: Huawei Technologies Co., Ltd. (Huawei Investment & Holding Co., Ltd.)
• Inventors: FU, HuiLi, LIN, Jyh Rong, ZHANG, Xiangxiong, CAI, Shujie
• Application Number:
  US16/723,269
• Publication Number:
  US 20200135615A1
• Time in Patent Office: Days
• CPC Class Codes: H01L 2224/0345 Physical vapour deposition [PVD], e.g. evaporation, or sputtering
• CPC Class Codes: H01L 2224/03462 Electroplating
• CPC Class Codes: H01L 2224/04026 Bonding areas specifically adapted for layer connectors
• CPC Class Codes: H01L 2224/131 with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/16227 the bump connector connecting to a bond pad of the item
• CPC Class Codes: H01L 2224/2929 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/29323 Magnesium [Mg] as principal constituent
• CPC Class Codes: H01L 2224/29324 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/29339 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/29344 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/29347 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/32221 the body and the item being stacked
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/73253 Bump and layer connectors
• CPC Class Codes: H01L 2224/8384 Sintering
• CPC Class Codes: H01L 23/3675 characterised by the shape of the housing
• CPC Class Codes: H01L 23/3736 Metallic materials H01L23/3732, H01L23/3733, H01L23/3735, H01L23/3737, H01L23/3738 take precedence
• CPC Class Codes: H01L 23/38 : Cooling arrangements using the Peltier effect
• CPC Class Codes: H01L 23/427 : Cooling by change of state, e.g. use of heat pipes by liquefied gas H01L23/445
• CPC Class Codes: H01L 24/03 : Manufacturing methods
• CPC Class Codes: H01L 24/05 : of an individual bonding area
• CPC Class Codes: H01L 24/13 : of an individual bump connector
• CPC Class Codes: H01L 24/16 : of an individual bump connector
• CPC Class Codes: H01L 24/29 : of an individual layer connector
• CPC Class Codes: H01L 24/32 : of an individual layer connector
• CPC Class Codes: H01L 24/73 : Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 25/0655 : the devices being arranged next to each other
• CPC Class Codes: H01L 25/18 : the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/16152 : Cap comprising a cavity for hosting the device, e.g. U-shaped cap
• CPC Class Codes: H01L 2924/16195 : Flat cap [not enclosing an internal cavity]
• CPC Class Codes: H01L 2924/16251 : Connecting to an item not being a semiconductor or solid-state body, e.g. cap-to-substrate
• CPC Class Codes: H01L 2924/163 : Connection portion, e.g. seal

Abstract

This application provides a chip package structure. The chip package structure includes: a substrate and a chip, and further includes: a heat dissipation ring fastened onto the substrate and a planar heat pipe radiator covering the heat dissipation ring. The substrate, the heat dissipation ring, and the planar heat pipe radiator form a space to enclose the chip. A first metal thin film is disposed on a surface, facing the chip, of the planar heat pipe radiator, and the chip is thermally coupled to the first metal thin film by using a sintered metal layer.

Claims

1. A chip package structure, comprising:

a substrate; and

a chip;

a heat dissipation ring fastened onto the substrate and a planar heat pipe radiator covering the heat dissipation ring, wherein the substrate, the heat dissipation ring, and the planar heat pipe radiator form a space to enclose the chip, wherein the chip is located within the space and fastened onto the substrate, a first metal thin film is disposed on a surface of the planar heat pipe radiator, facing the chip, and the chip is thermally coupled to the first metal thin film by using a sintered metal layer.

2. The chip package structure according to claim 1, wherein a second metal thin film is disposed on a surface of the chip, facing the planar heat pipe radiator, and the sintered metal layer is thermally coupled to the second metal thin film.

3. The chip package structure according to claim 2, wherein the sintered metal layer comprises a plurality of metal particles and a filling layer enclosing the plurality of metal particles.

4. The chip package structure according to claim 3, wherein the metal particles are silver particles, aluminum particles, copper particles, magnesium particles, or gold particles.

5. The chip package structure according to claim 3, wherein the metal particles are sintered with the first metal thin film and the second metal thin film to form an atomic continuous phase structure.

6. The chip package structure according to claim 3, wherein the filling layer is an air layer or an adhesive layer.

7. The chip package structure according to claim 2, wherein the first metal thin film is disposed on the planar heat pipe radiator in a sputtering or electroplating manner, and the second metal thin film is disposed on the chip in a sputtering or electroplating manner.

8. The chip package structure according to claim 1, wherein there are m chips, a thermoelectric cooler is disposed between n chips and the planar heat pipe radiator, one surface of the thermoelectric cooler is connected to the planar heat pipe radiator, and the other surface of the thermoelectric cooler is thermally coupled to the chips by using the sintered metal layer, wherein both m and n are integers, m≥

1, and m≥

n.

9. The chip package structure according to claim 8, wherein the thermoelectric cooler is a power-adjustable thermoelectric cooler.

10. The chip package structure according to claim 8, wherein a third metal thin film is disposed on a surface, facing the chip, of the thermoelectric cooler.

11. The chip package structure according to claim 9, wherein the third metal thin film is disposed on the thermoelectric cooler in a sputtering or electroplating manner.

12. The chip package structure according to claim 1, wherein the heat dissipation ring is separately bonded to the substrate and the planar heat pipe radiator.

13. The chip package structure according to claim 1, wherein the heat dissipation ring is integrated with the planar heat pipe radiator, and the heat dissipation ring is bonded to the substrate.