PACKAGE STRUCTURE WITH BUMP
First Claim
1. A package structure, comprising:
- a redistribution layer;
a first integrated circuit chip having a first chip edge and a second integrated circuit chip having a second chip edge over the redistribution layer;
first bumps electrically connected to the first integrated circuit chip through the redistribution layer, wherein the first bumps overlap the first integrated circuit chip and are arranged along a first chip edge of the first integrated circuit chip in plan view; and
second bumps electrically connected to the first integrated circuit chip through the redistribution layer without overlapping the first integrated circuit chip and the second integrated circuit chip, wherein none of the second bumps is arranged between the first chip edge and the second chip edge in plan view.
1 Assignment
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Accused Products
Abstract
A package structure is provided. The package structure includes a redistribution layer and a first integrated circuit chip having a first chip edge and a second integrated circuit chip having a second chip edge over the redistribution layer. The package structure also includes first bumps electrically connected to the first integrated circuit chip through the redistribution layer. In addition, the first bumps overlap the first integrated circuit chip and are arranged along a first chip edge of the first integrated circuit chip. The package structure further includes second bumps electrically connected to the first integrated circuit chip through the redistribution layer without overlapping the first integrated circuit chip and the second integrated circuit chip. In addition, none of the second bumps is arranged between the first chip edge and the second chip edge.
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Citations
20 Claims
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1. A package structure, comprising:
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a redistribution layer; a first integrated circuit chip having a first chip edge and a second integrated circuit chip having a second chip edge over the redistribution layer; first bumps electrically connected to the first integrated circuit chip through the redistribution layer, wherein the first bumps overlap the first integrated circuit chip and are arranged along a first chip edge of the first integrated circuit chip in plan view; and second bumps electrically connected to the first integrated circuit chip through the redistribution layer without overlapping the first integrated circuit chip and the second integrated circuit chip, wherein none of the second bumps is arranged between the first chip edge and the second chip edge in plan view. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A package structure, comprising:
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a redistribution layer; a first integrated circuit chip having a first chip edge and a second integrated circuit chip having a second chip edge over the redistribution layer; a first bump and a second bump connected to the redistribution layer; wherein the first bump is directly under the first integrated circuit chip and the second bump are directly under a region between the first chip edge and the second chip edge, and a distance between the second bump and the first chip edge is different from a distance between the first bump and the first chip edge. - View Dependent Claims (9, 10, 11, 12, 13)
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14. A package structure, comprising:
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a package layer; a first chip in the package layer, wherein the first chip has a first chip edge; a second chip in the package layer, wherein the second chip has a second chip edge; first bumps under the first chip; second bumps under the second chip; and third bumps under the package layer without overlapping the first chip and the second chip, wherein a distance between the first chip edge and the second chip edge is smaller than a distance between two of the neighboring first bumps. - View Dependent Claims (15, 16, 17, 18, 19, 20)
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Specification