MITIGATING MOISTURE-DRIVEN DEGRADATION OF FEATURES DESIGNED TO PREVENT STRUCTURAL FAILURE OF SEMICONDUCTOR WAFERS

• US 20200135662A1
• Filed: 10/31/2018
• Published: 04/30/2020
• Est. Priority Date: 10/31/2018
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: IRUVANTI, SUSHUMNA, LI, SHIDONG, OSTRANDER, STEVE, CASEY, JON ALFRED, SUNDLOF, BRIAN RICHARD
• Granted Patent: US 10,892,233 B2
• Time in Patent Office: Days
• CPC Class Codes: H01L 21/0254 Nitrides
• CPC Class Codes: H01L 21/76877 Filling of holes, grooves or trenches, e.g. vias, with conductive material
• CPC Class Codes: H01L 2224/131 with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 23/26 including materials for absorbing or reacting with moisture or other undesired substances , e.g. getters
• CPC Class Codes: H01L 23/562 Protection against mechanical damage H01L23/02, H01L23/28 take precedence
• CPC Class Codes: H01L 23/564 Details not otherwise provided for, e.g. protection against moisture getters H01L23/26
• CPC Class Codes: H01L 23/585 comprising conductive layers or plates or strips or rods or rings H01L23/60, H01L23/62, H01L23/64, H01L23/66 take precedence
• CPC Class Codes: H01L 24/16 of an individual bump connector
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/014 Solder alloys
• CPC Class Codes: H01L 2924/351 Thermal stress
• CPC Class Codes: H01L 2924/35121 Peeling or delaminating

Abstract

Moisture-driven degradation of a crack stop in a semiconductor die is mitigated by forming a groove in an upper surface of the die between an edge of the die and the crack stop; entirely filling the groove with a moisture barrier material; preventing moisture penetration of the semiconductor die by presence of the moisture barrier material; and dissipating mechanical stress in the moisture barrier material without presenting a stress riser in the bulk portion of the die. The moisture barrier material is at least one of moisture-absorbing, moisture adsorbing, and hydrophobic.

Claims

1. A method comprising:

forming a groove in an upper surface of a semiconductor die between an edge of the die and a crack stop that extends parallel to the edge of the die, the groove being formed outboard of the crack stop; and

depositing a moisture barrier material into the groove to entirely fill the groove.

2. The method of claim 1, wherein the moisture barrier material is a first moisture barrier material, further comprising depositing a second moisture barrier material over the side walls of the semiconductor die.

3. The method of claim 2 wherein the second moisture barrier material is parylene.

4. The method of claim 1 further comprising preventing deposition of the moisture barrier material onto the upper surface of the die by masking the upper surface of the die before depositing the moisture barrier material into the groove.

5. The method of claim 1 wherein the moisture barrier material is silicon nitride.

6. The method of claim 1 wherein the moisture barrier material is a zeolite.

7. The method of claim 1 wherein the moisture barrier material is tetraethylorthosilicate.

8. An apparatus comprising:

a semiconductor die having an edge;

a crack stop, formed in the die, that extends parallel to the die edge;

a groove, formed in an upper surface of the die, that extends parallel to the crack stop between the crack stop and the die edge; and

a first moisture barrier material that fills the entire depth of the groove.

9. The apparatus of claim 8, wherein the moisture barrier material is silicon nitride.

10. The apparatus of claim 8, wherein the moisture barrier material is a zeolite.

11. The apparatus of claim 8, wherein the moisture barrier material is tetraethylorthosilicate.

12. The apparatus of claim 8, wherein the die has sidewalls, further comprising a carrier substrate to which the die is attached and a second moisture barrier material covering the die sidewalls and a top surface of the carrier substrate.

13. The apparatus of claim 12, wherein the second moisture barrier material is further deposited over an upper surface of the die.

14. The apparatus of claim 12, wherein the second moisture barrier material is parylene.

15. A method of mitigating moisture-driven degradation of a crack stop in a semiconductor die including a bulk portion, the method comprising:

forming a groove in an upper surface of the die between an edge of the die and the crack stop;

entirely filling the groove with a moisture barrier material, wherein the moisture barrier material is at least one of moisture-absorbing, moisture adsorbing, and hydrophobic;

preventing moisture penetration of the semiconductor die by presence of the moisture barrier material; and

dissipating mechanical stress in the moisture barrier material without presenting a stress riser in the bulk portion of the die.

16. The method of claim 15, wherein the moisture barrier material is silicon nitride

17. The method of claim 15 wherein the moisture barrier material is a zeolite.

18. The method of claim 15 wherein the moisture barrier material is tetraethylorthosilicate.

19. The method of claim 15 further comprising preventing deposition of the moisture barrier material onto the upper surface of the die by masking the upper surface of the die before depositing the moisture barrier material into the groove.

20. The method of claim 15, wherein the moisture barrier material comprises a first moisture barrier material, further comprising:

attaching the die to a chip carrier substrate; and

coating the sidewalls of the die and a top surface of the chip carrier in a second barrier material.