POWER ELECTRONIC ASSEMBLIES WITH HIGH PURITY ALUMINUM PLATED SUBSTRATES

• US 20200135681A1
• Filed: 10/25/2018
• Published: 04/30/2020
• Est. Priority Date: 10/25/2018
• Status: Active Grant

• Current Assignee: DENSO Corporation
• Original Assignee: Toyota Motor Engineering & Manufacturing North America Incorporated (Toyota Motor Corporation)
• Inventors: Joshi, Shailesh N., Take, Naoya
• Granted Patent: US 10,804,236 B2
• Time in Patent Office: Days
• CPC Class Codes: H01L 2224/27462 Electroplating
• CPC Class Codes: H01L 2224/29082 Two-layer arrangements
• CPC Class Codes: H01L 2224/29083 Three-layer arrangements
• CPC Class Codes: H01L 2224/29105 Gallium [Ga] as principal constituent
• CPC Class Codes: H01L 2224/29109 Indium [In] as principal constituent
• CPC Class Codes: H01L 2224/29111 Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/29113 Bismuth [Bi] as principal constituent
• CPC Class Codes: H01L 2224/29123 Magnesium [Mg] as principal constituent
• CPC Class Codes: H01L 2224/29124 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/29138 the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
• CPC Class Codes: H01L 2224/29139 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/29147 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/29155 Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/29299 Base material
• CPC Class Codes: H01L 2224/29309 Indium [In] as principal constituent
• CPC Class Codes: H01L 2224/29311 Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/29313 Bismuth [Bi] as principal constituent
• CPC Class Codes: H01L 2224/29323 Magnesium [Mg] as principal constituent
• CPC Class Codes: H01L 2224/29339 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/32014 the layer connector being smaller than the bonding area, e.g. bond pad
• CPC Class Codes: H01L 2224/32245 : the item being metallic
• CPC Class Codes: H01L 2224/32503 : comprising an intermetallic compound
• CPC Class Codes: H01L 2224/33181 : On opposite sides of the body
• CPC Class Codes: H01L 2224/45099 : Material
• CPC Class Codes: H01L 2224/48091 : Arched
• CPC Class Codes: H01L 2224/48175 : the item being metallic
• CPC Class Codes: H01L 2224/48245 : the item being metallic
• CPC Class Codes: H01L 2224/73215 : Layer and wire connectors
• CPC Class Codes: H01L 2224/73265 : Layer and wire connectors
• CPC Class Codes: H01L 2224/83097 : Heating
• CPC Class Codes: H01L 2224/83192 : wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/83193 : wherein the layer connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/83424 : Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/83447 : Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/83455 : Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/8381 : involving forming an intermetallic compound at the bonding interface
• CPC Class Codes: H01L 2224/83825 : Solid-liquid interdiffusion
• CPC Class Codes: H01L 2224/83895 : between electrically conductive surfaces, e.g. copper-copper direct bonding, surface activated bonding
• CPC Class Codes: H01L 23/3121 : a substrate forming part of the encapsulation
• CPC Class Codes: H01L 23/3735 : Laminates or multilayers, e.g. direct bond copper ceramic substrates
• CPC Class Codes: H01L 23/3736 : Metallic materials H01L23/3732, H01L23/3733, H01L23/3735, H01L23/3737, H01L23/3738 take precedence
• CPC Class Codes: H01L 23/4334 : Auxiliary members in encapsulations H01L23/49568 takes precedence
• CPC Class Codes: H01L 23/562 : Protection against mechanical damage H01L23/02, H01L23/28 take precedence
• CPC Class Codes: H01L 24/27 : Manufacturing methods
• CPC Class Codes: H01L 24/29 : of an individual layer connector
• CPC Class Codes: H01L 24/32 : of an individual layer connector
• CPC Class Codes: H01L 24/33 : of a plurality of layer connectors
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/73 : Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 24/83 : using a layer connector
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01024 : Chromium [Cr]
• CPC Class Codes: H01L 2924/01204 : 4N purity grades, i.e. 99.99%
• CPC Class Codes: H01L 2924/013 : Alloys
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/20106 : Temperature range 200 C=<T<250 C, 473.15 K =<T < 523.15K
• CPC Class Codes: H01L 2924/20108 : Temperature range 300 C=<T<350 C, 573.15K =<T< 623.15K
• CPC Class Codes: H01L 2924/351 : Thermal stress
• CPC Class Codes: H05K 7/209 : Heat transfer by conduction from internal heat source to heat radiating structure H05K7/20909 takes precedence

Abstract

An assembly that includes a first substrate, a second substrate, and a stress mitigation layer disposed between the first and the second substrates. The stress mitigation layer is directly bonded onto the second substrate, and the second substrate is separated from the intermetallic compound layer by the stress mitigation layer. The stress mitigation layer has a high purity of at least 99% aluminum such that the stress mitigation layer reduces thermomechanical stresses on the first and second substrates. The assembly further includes an intermetallic compound layer disposed between the first substrate and the stress mitigation layer such that the stress mitigation layer is separated from the first substrate by the intermetallic compound layer.

Claims

1. An assembly comprising:

a first substrate;

a second substrate;

a stress mitigation layer disposed between the first and the second substrates, wherein;

the stress mitigation layer is directly bonded onto the second substrate, and

the second substrate is separated from the intermetallic compound layer by the stress mitigation layer; and

the stress mitigation layer has a high purity of at least 99% aluminum such that the stress mitigation layer reduces thermomechanical stresses on the first and second substrates; and

an intermetallic compound layer disposed between the first substrate and the stress mitigation layer such that the stress mitigation layer is separated from the first substrate by the intermetallic compound layer.

2. The assembly of claim 1, wherein the first substrate is a semiconductor device.

3. The assembly of claim 1, wherein the stress mitigation layer is formed of aluminum having a purity of at least 99.0%.

4. The assembly of claim 1, wherein the stress mitigation layer is formed of aluminum with at least 99.99% purity.

5. The assembly of claim 1, wherein the first substrate comprises silicon.

6. The assembly of claim 1, wherein the second substrate comprises copper or nickel.

7. The assembly of claim 1, wherein the second substrate is in electrical communication with the first substrate through the stress mitigation layer.

8. The assembly of claim 1, wherein the stress mitigation layer comprises an elastic modulus of about 11 MPa or less.

9. The assembly of claim 1, wherein the intermetallic compound layer comprises a bonding temperature of 300°

Celsius or greater.

10. The assembly of claim 1, further comprising a high melting temperature layer disposed between the intermetallic compound layer and the stress mitigation layer.

11. The assembly of claim 10, wherein the high melting temperature layer comprises copper or nickel.

12. The assembly of claim 1, wherein the intermetallic compound layer comprises copper, nickel, or silicon.

13. A power electronic assembly comprising:

a metal substrate having a bonding surface;

a semiconductor device having a corresponding bonding surface, the semiconductor device is in electrical communication with the metal substrate;

a metallic interlayer bonded to the corresponding bonding surface of the semiconductor device;

a high-purity aluminum layer directly bonded to the bonding surface of the metal substrate and the metallic interlayer opposite of the metal substrate, wherein the high-purity aluminum layer separates the metal substrate from the metallic interlayer, the high-purity aluminum layer comprises an elastic modulus of about 7 MPa to about 11 MPa and is configured to mitigate stresses endured on the metal substrate.

14. The power electronic assembly of claim 13, wherein the high-purity aluminum layer comprises at least 99% aluminum.

15. The power electronic assembly of claim 13, wherein the metallic interlayer comprises copper or nickel.

16. The power electronic assembly of claim 13, further comprising a high melting temperature layer disposed between the intermetallic compound layer and the stress mitigation layer.

17. The power electronic assembly of claim 16, wherein the high melting temperature layer comprises copper or nickel.

18. A process for manufacturing a power electronics assembly comprising:

directly bonding an aluminum layer onto a substrate, wherein the aluminum layer comprises aluminum having a purity of at least 99%;

depositing a high melting temperature layer onto the aluminum layer;

depositing a low melting temperature layer onto the high melting temperature layer opposite of the aluminum layer, wherein the low melting temperature layer has a melting temperature that is lower than the high melting temperature layer;

disposing a semiconductor device onto the low melting temperature layer opposite of the high melting temperature layer to assemble the power electronics assembly; and

heating the power electronics assembly to melt the low melting temperature layer and diffuse the low melting temperature layer into at least the semiconductor device and the high melting temperature layer, wherein an intermetallic compound layer is formed between the semiconductor device and the aluminum layer such that the intermetallic compound layer bonds the semiconductor device to the aluminum layer; and

wherein the aluminum layer provides stress mitigating characteristics between the semiconductor device and the substrate.

19. The process of claim 18, further comprising diffusing the high melting temperature layer during the heating such that the intermetallic compound layer is directly bonded to the aluminum layer.

20. The process of claim 18, wherein the melting temperature of the low melting temperature layer is about 230°

Celsius and a bonding temperature of the intermetallic compound layer formed by the diffusion of the low melting temperature layer is about 300°

Celsius or greater.