SEMICONDUCTOR PACKAGE
First Claim
1. A semiconductor package, comprising:
- a first semiconductor chip including a first bonding layer on a surface; and
a chip structure stacked on the first semiconductor chip and including a second bonding layer on a surface facing the first semiconductor chip and a plurality of second semiconductor chips, wherein;
the plurality of second semiconductor chips include a chip area and a scribe area outside of the chip area, respectively, the plurality of second semiconductor chips being connected to each other by the scribe area in the chip structure, andthe first and second bonding layers include first and second metal pads disposed to correspond to each other and bonded to each other, respectively, and first and second bonding insulating layers surrounding the first and second metal pads, respectively.
1 Assignment
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Accused Products
Abstract
A semiconductor package includes a first semiconductor chip including a first bonding layer, on one surface, and a chip structure stacked on the first semiconductor chip and including a second bonding layer on a surface facing the first semiconductor chip and a plurality of second semiconductor chips. The plurality of second semiconductor chips includes a chip area and a scribe area outside of the chip area, respectively, the plurality of second semiconductor chips being connected to each other by the scribe area in the chip structure. The first and second bonding layers include first and second metal pads disposed to correspond to each other and bonded to each other, respectively and first and second bonding insulating layers surrounding the first and second metal pads, respectively.
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Citations
20 Claims
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1. A semiconductor package, comprising:
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a first semiconductor chip including a first bonding layer on a surface; and a chip structure stacked on the first semiconductor chip and including a second bonding layer on a surface facing the first semiconductor chip and a plurality of second semiconductor chips, wherein; the plurality of second semiconductor chips include a chip area and a scribe area outside of the chip area, respectively, the plurality of second semiconductor chips being connected to each other by the scribe area in the chip structure, and the first and second bonding layers include first and second metal pads disposed to correspond to each other and bonded to each other, respectively, and first and second bonding insulating layers surrounding the first and second metal pads, respectively. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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15. A semiconductor package, comprising:
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a first semiconductor chip including a first bonding layer on a surface, and having a device area in which semiconductor devices are disposed and a via area on at least one side of the device area, the via area being provided with through vias disposed therein; and a chip structure stacked on the first semiconductor chip and bonded to the first semiconductor chip through the first bonding layer, and including a second bonding layer connected to the first bonding layer and a plurality of second semiconductor chips, wherein the plurality of second semiconductor chips include a chip area and a scribe area outside of the chip area, respectively, the plurality of second semiconductor chips being connected to each other by the scribe area in the chip structure. - View Dependent Claims (16, 17)
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18. A semiconductor package, comprising:
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a first semiconductor chip including first metal pads on a surface; a first redistribution portion on the first semiconductor chip and including a first redistribution layer electrically connected to the first semiconductor chip and second metal pads on a lower surface thereof and bonded to the first metal pads; and a chip structure on the first redistribution portion and including a plurality of second semiconductor chips, wherein the first semiconductor chip has a size that is substantially the same as a size of the chip structure on a plane. - View Dependent Claims (19, 20)
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Specification