SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SOLDERING SUPPORT JIG

• US 20200135691A1
• Filed: 12/23/2019
• Published: 04/30/2020
• Est. Priority Date: 08/17/2017
• Status: Active Grant

• Current Assignee: Fuji Electric Company Limited (Fuji Electric Systems Company Limited)
• Original Assignee: Fuji Electric Company Limited (Fuji Electric Systems Company Limited)
• Inventors: MARUYAMA, Rikihiro, KAI, Kenshi, ADACHI, Kazuya
• Granted Patent: US 11,164,846 B2
• Time in Patent Office: Days
• CPC Class Codes: H01L 2224/0603 Bonding areas having different sizes, e.g. different heights or widths
• CPC Class Codes: H01L 2224/29101 the principal constituent melting at a temperature of less than 400°C
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/45139 Silver (Ag) as principal constituent
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/45147 Copper (Cu) as principal constituent
• CPC Class Codes: H01L 2224/48139 with an intermediate bond, e.g. continuous wire daisy chain
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48472 the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
• CPC Class Codes: H01L 2224/4911 the connectors being bonded to at least one common bonding area, e.g. daisy chain
• CPC Class Codes: H01L 2224/49111 the connectors connecting two common bonding areas, e.g. Litz or braid wires
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/83005 being a temporary or sacrificial substrate
• CPC Class Codes: H01L 2224/83136 involving guiding structures, e.g. spacers or supporting members
• CPC Class Codes: H01L 2224/83192 wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/83203 Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
• CPC Class Codes: H01L 2224/83815 Reflow soldering
• CPC Class Codes: H01L 2224/85897 between electrically conductive surfaces, e.g. copper-copper direct bonding, surface activated bonding
• CPC Class Codes: H01L 2224/92247 : the second connecting process involving a wire connector
• CPC Class Codes: H01L 24/29 : of an individual layer connector
• CPC Class Codes: H01L 24/32 : of an individual layer connector
• CPC Class Codes: H01L 24/45 : of an individual wire connector
• CPC Class Codes: H01L 24/73 : Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 24/83 : using a layer connector
• CPC Class Codes: H01L 24/85 : using a wire connector wire bonding in general B23K20/004
• CPC Class Codes: H01L 24/92 : Specific sequence of method steps
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/13055 : Insulated gate bipolar transistor [IGBT]
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/19105 : in a side-by-side arrangement on a common die mounting substrate
• CPC Class Codes: H01L 2924/19107 : off-chip wires
• CPC Class Codes: H01L 2924/2076 : equal to or larger than 100 microns

Abstract

A semiconductor device manufacturing method includes: applying solder to an arrangement area of a substrate, the substrate having a connection area to which a wiring member is to be directly connected, the connection area neighboring the arrangement area; arranging a component on the arrangement area via the solder; and soldering the component to the arrangement area by heating the solder while covering the connection area. A soldering support jig includes a columnar covering member having a covering surface at a bottom of the columnar covering member.

Claims

1. A semiconductor device manufacturing method comprising:

applying solder to an arrangement area of a substrate, the substrate having a connection area to which a wiring member is to be directly connected, the connection area neighboring the arrangement area;

arranging a component on the arrangement area via the solder; and

soldering the component to the arrangement area by heating the solder while covering the connection area.

2. The semiconductor device manufacturing method according to claim 1, wherein

the soldering is performed by heating the solder while covering the connection area using a soldering support jig arranged on the substrate so that a covering surface of the soldering support jig covers the connection area,

the soldering support jig includes a columnar covering member, and

the covering surface is at a bottom of the columnar covering member.

3. The semiconductor device manufacturing method according to claim 1, further comprising, after the soldering, directly bonding the wiring member to the connection area.

4. The semiconductor device manufacturing method according to claim 2, wherein the arranging the component includes:

arranging a plate-shaped positioning jig on the substrate, the positioning jig having a lower opening formed in a principal surface of the positioning jig, the lower opening corresponding to the arrangement area; and

arranging the component on the arrangement area, based on the lower opening.

5. The semiconductor device manufacturing method according to claim 4, wherein the soldering includes arranging the soldering support jig in the lower opening of the positioning jig arranged on the substrate.

6. The semiconductor device manufacturing method according to claim 5, wherein the positioning jig has a contact component positioning hole formed in the principal surface,

the preparing further includes preparing a contact component, and

the arranging of the component includes

arranging the positioning jig on the substrate, and

arranging the contact component on the substrate in the contact component positioning hole.

7. The semiconductor device manufacturing method according to claim 6, wherein the soldering includes heating the solder while pressing the contact component toward the substrate.

8. The semiconductor device manufacturing method according to claim 7, wherein the soldering includes:

arranging a plate-shaped pressing jig on the positioning jig, the pressing jig having an upper opening corresponding to the lower opening of the positioning jig;

arranging the soldering support jig in the lower opening of the positioning jig and the upper opening of the pressing jig; and

heating the solder while pressing the contact component toward the substrate with the pressing jig.

9. The semiconductor device manufacturing method according to claim 7, wherein the soldering includes:

arranging a plate-shaped pressing jig, to which a surface of the soldering support jig opposite to the covering surface is attached at an area corresponding to the lower opening of the positioning jig, on the positioning jig so that the covering surface covers the connection area; and

heating the solder while pressing the contact component toward the substrate with the pressing jig.

10. The semiconductor device manufacturing method according to claim 1, wherein the component is a semiconductor element.