SEMICONDUCTOR DEVICE

• US 20200135717A1
• Filed: 09/13/2019
• Published: 04/30/2020
• Est. Priority Date: 10/30/2018
• Status: Active Grant

• Current Assignee: Mitsubishi Electric Corporation
• Original Assignee: Mitsubishi Electric Corporation
• Inventors: TAKAHASHI, Tetsuo, KANEDA, Mitsuru
• Granted Patent: US 11,158,630 B2
• Time in Patent Office: Days
• CPC Class Codes: H01L 27/0647 Bipolar transistors in combination with diodes, or capacitors, or resistors, e.g. vertical bipolar transistor and bipolar lateral transistor and resistor
• CPC Class Codes: H01L 27/0727 in combination with diodes, or capacitors or resistors
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/0834 Anode regions of thyristors or gated bipolar-mode devices, e.g. supplementary regions surrounding anode regions
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/32 the imperfections being within the semiconductor body
• CPC Class Codes: H01L 29/402 Field plates
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/66348 with a recessed gate
• CPC Class Codes: H01L 29/7393 Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
• CPC Class Codes: H01L 29/7397 and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
• CPC Class Codes: H01L 29/861 Diodes
• CPC Class Codes: H01L 29/8613 Mesa PN junction diodes

Abstract

A semiconductor device includes an IGBT as a switching element, and a diode. The IGBT includes: a p type channel doped layer formed in a surface layer part on a front side of a semiconductor substrate; a p⁺ type diffusion layer and an n⁺ type source layer individually selectively formed in a surface layer part of the p type channel doped layer; and an emitter electrode connected to the n⁺ type source layer and the p⁺ type diffusion layer. A part of the p type channel doped layer reaches a front-side surface of the semiconductor substrate and is connected to the emitter electrode. On the front-side surface of the semiconductor substrate, the p⁺ type diffusion layer is interposed between the p type channel doped layer and an n⁺ type source layer, and the p type channel doped layer and the n⁺ type source layer are not adjacent to each other.

Claims

1. A semiconductor device comprising:

a switching element having

a channel doped layer of a first conductivity type formed in a surface layer part on a front side of a semiconductor substrate,

a first diffusion layer of a first conductivity type selectively formed in a surface layer part of the channel doped layer and having a higher impurity concentration than that of the channel doped layer,

a source layer of a second conductivity type selectively formed in a surface layer part of the channel doped layer, and

an electrode formed on a front-side surface of the semiconductor substrate and connected to the source layer and the first diffusion layer; and

a diode formed between the first diffusion layer and a second diffusion layer of a second conductivity type formed in a surface layer part on a back side of the semiconductor substrate,

wherein

a part of the channel doped layer reaches a front-side surface of the semiconductor substrate and is connected to the electrode, and

on a front-side surface of the semiconductor substrate, the first diffusion layer is interposed between the channel doped layer and the source layer, and the channel doped layer and the source layer are not adjacent to each other.

2. The semiconductor device according to claim 1, wherein

on a front-side surface of the semiconductor substrate, the first diffusion layer between the channel doped layer and the source layer is a portion where an impurity concentration of a first conductivity type is highest.

3. The semiconductor device according to claim 1, wherein

the first diffusion layer is formed deeper than the source layer, and the first diffusion layer extends until below the source layer at a portion adjacent to the source layer.

4. The semiconductor device according to claim 1, wherein

the switching element is an IGBT including a collector layer of a first conductivity type formed in a surface layer part on a back side of the semiconductor substrate.

5. The semiconductor device according to claim 4, wherein

in the semiconductor substrate, an IGBT region formed with the IGBT and a diode region formed with the diode are arranged to be segmented from each other in plan view, and

a portion of the channel doped layer connected to the electrode is formed at least in the IGBT region.

6. The semiconductor device according to claim 5, wherein

in the IGBT region, cells of a plurality of the IGBTs are partitioned in a stripe shape, and

on a front-side surface of the semiconductor substrate of the IGBT region, a portion of the channel doped layer connected to the electrode is adjacent exclusively to the first diffusion layer.

7. The semiconductor device according to claim 5, wherein

in the IGBT region, cells of a plurality of the IGBTs are partitioned in a lattice shape, and

on a front-side surface of the semiconductor substrate of the IGBT region, a portion of the channel doped layer connected to the electrode is adjacent exclusively to the first diffusion layer.

8. The semiconductor device according to claim 5, wherein

a portion of the channel doped layer connected to the electrode is formed at least in a cell of the IGBT adjacent to the diode region.

9. The semiconductor device according to claim 5, wherein

also in the diode region, a part of the channel doped layer reaches a front-side surface of the semiconductor substrate and is connected to the electrode.

10. The semiconductor device according to claim 9, wherein

in the diode region, an area ratio of a portion of the channel doped layer connected to the electrode is increased as a region is closer to the IGBT region.

11. The semiconductor device according to claim 5, further comprising

a drift layer of a second conductivity type formed under the channel doped layer of the IGBT region and the diode region;

and

a damage layer formed on the drift layer of the diode region.