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DOUBLE RULE INTEGRATED CIRCUIT LAYOUTS FOR A DUAL TRANSMISSION GATE

  • US 20200135732A1
  • Filed: 12/26/2019
  • Published: 04/30/2020
  • Est. Priority Date: 06/28/2018
  • Status: Active Grant
First Claim
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1. A dual transmission gate, comprising:

  • a first pair of complementary metal-oxide-semiconductor field-effect (CMOS) transistors, situated within a first column from among a plurality of columns of an electronic device design real estate, arranged to form a first transmission gate, the first transmission gate being configured to route a first signal between a first terminal and a second terminal in response to a first clocking signal being at a first logical level and a second clocking signal being at a second logical level;

    a second pair of CMOS transistors, situated within a second column from among the plurality of columns, arranged to form a second transmission gate, the second transmission gate being configured to route a second signal between the second terminal and a third terminal in response to the first clocking signal being at the second logical level and the second clocking signal being at the first logical level;

    a first region and a second region corresponding to the first clocking signal situated within a first interconnection layer of a semiconductor stack along a first row and a second row, respectively, from among a plurality of rows of the electronic device design real estate;

    a third region, situated within a second interconnection layer of the semiconductor stack along a third column from among the plurality of columns, connected to the first region and the second region;

    a fourth region and a fifth region corresponding to the second clocking signal situated within the first interconnection layer of the semiconductor stack along a third row and a fourth row, respectively, from among the plurality of rows; and

    a sixth region, situated within the second interconnection layer of the semiconductor stack along a fourth column from among the plurality of columns, connected to the fourth region and the fifth region.

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