DISPLAY PANEL INCLUDING LINK LINES

• US 20200135764A1
• Filed: 10/07/2019
• Published: 04/30/2020
• Est. Priority Date: 10/26/2018
• Status: Active Grant

• Current Assignee: LG Display Co., Ltd.
• Original Assignee: LG Display Co., Ltd.
• Inventors: HA, Jongmoo, PARK, NamKil, PARK, Daewon
• Granted Patent: US 11,024,654 B2
• Time in Patent Office: Days
• CPC Class Codes: G02F 1/1345 Conductors connecting electrodes to cell terminals
• CPC Class Codes: G02F 1/13454 Drivers integrated on the active matrix substrate G02F1/136277 takes precedence
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 2201/56 Substrates having a particular shape, e.g. non-rectangular
• CPC Class Codes: G09G 2300/0408 Integration of the drivers onto the display substrate
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2310/0264 Details of driving circuits
• CPC Class Codes: G09G 2310/0281 Arrangement of scan or data electrode driver circuits at the periphery of a panel not inherent to a split matrix structure
• CPC Class Codes: G09G 3/20 for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H10K 59/131 Interconnections, e.g. wiring lines or terminals

Abstract

A display panel includes: a display area including: a curved boundary in plan view, and a pixel array including pixel rows, and a non-display area in a periphery of the display area, and including: a curved boundary in plan view, a plurality of gate blocks arranged along the curved boundary of the non-display area, and at least one dummy block among the gate blocks, and a plurality of link lines configured to connect the gate blocks to the pixel rows, at least one of the link lines being multi-segmented to include a plurality of segments oriented in different directions in plan view.

Claims

1. A display panel, comprising:

a display area comprising;

a curved boundary in plan view; and

a pixel array comprising pixel rows; and

a non-display area in a periphery of the display area, and comprising;

a curved boundary in plan view;

a plurality of gate blocks arranged along the curved boundary of the non-display area; and

at least one dummy block among the gate blocks; and

a plurality of link lines configured to connect the gate blocks to the pixel rows, at least one of the link lines being multi-segmented to comprise a plurality of segments oriented in different directions in plan view.

2. The display panel of claim 1, wherein:

the plurality of gate blocks comprises first to m^th gate blocks, ‘

m’

being an integer;

a number of pixels connected to the first gate block is larger than a number of pixels connected to the m^th gate block; and

the dummy block is adjacent to the first gate block.

3. The display panel of claim 1, wherein:

each of a plurality of ‘

m’

-numbered multi-segmented link lines, among the plurality of link lines, in the non-display area, ‘

m’

being an integer, comprises;

a first sub-link line;

a second sub-link line; and

a third sub-link line,

the second sub-link line connects the first sub-link line to the third sub-link line, and

the second sub-link lines are parallel to one another.

4. The display panel of claim 1, wherein:

a number of link lines connected to the gate blocks arranged along the curved boundary of the non-display area of the display panel is a multiple of ‘

m’

, ‘

m’

being an integer;

each of the link lines, among the multiple of ‘

m’

link lines, comprises;

a first sub-link line;

a second sub-link line; and

a third sub-link line;

the first sub-link line is connected to the gate line; and

the second sub-link line connects the first sub-link line to the third sub-link line.

5. The display panel of claim 4, wherein:

a virtual line is defined by connecting the centers of the second sub-link lines; and

an acute angle is between the virtual line and the gate line or between the virtual line and the first sub-link line.

6. The display panel of claim 4, wherein an obtuse angle is between the first sub-link line and the gate line.

7. The display panel of claim 4, wherein:

the first sub-link line and the second sub-link line are perpendicular to each other; and

the second sub-link line and the third sub-link line are perpendicular to each other.

8. The display panel of claim 4, wherein a right angle or an obtuse angle is between the second sub-link line and the first sub-link line or between the second sub-link line and the gate line.

9. The display panel of claim 4, wherein:

the third sub-link line is parallel to the first sub-link line or the gate line; and

the third sub-link line is on a virtual line obtained by connecting the gate block and a center of the curved-boundary of the non-display area.

10. A display panel comprising a non-rectangular portion divided into at least a first area and a second area, comprising:

a non-rectangular portion comprising;

a first area; and

a second area;

‘

x’

-numbered gate lines in the first area; and

‘

y’

-numbered gate lines in the second area, where x>

y, and each of ‘

x’ and

‘

y’

is an integer;

a gate driver configured to transmit respective gate signals to the gate lines;

a dummy block in the second area, the dummy block being adjacent to the first area; and

a plurality of link lines, each configured to connect the gate driver to a corresponding one of the gate lines.

11. The display panel of claim 10, wherein the plurality of link lines comprises:

a first link line in the first area and nearest to the second area, the first link line being a straight line, and

a second link line in the first area and farther from the second area than the first link line, the second link line being multi-segmented to comprise a plurality of segments oriented in different directions in plan view.

12. The display panel of claim 10, wherein:

the gate driver comprises a plurality of gate blocks;

the plurality of gate blocks are arranged in a radial shape in the non-rectangular portion; and

each of the plurality of gate blocks is configured to provide a signal to a plurality of gate lines.

13. The display panel of claim 12, wherein, in the second area, the dummy block is closer to the first area than a first gate block, among the plurality of gate blocks, is to the first area.

14. The display panel of claim 10, wherein:

the plurality of link lines is in a bezel,

at least some of the plurality of link lines each comprises;

a first bent point; and

a second bent point; and

a virtual line, obtained by connecting the first bent points or second bent points of the at least some of the plurality of link lines in the first area and the second area, is along a direction in which the bezel does not increase in size.

15. The display panel of claim 14, wherein an angle between the virtual line and the gate line is an acute angle.

16. The display panel of claim 14, wherein a segment connecting the first bent point and the second bent point in each of the some of the plurality of link lines is at a right angle or an obtuse angle with respect to the corresponding one of the gate lines.

17. A display panel, comprising:

a display area comprising a plurality of pixels;

a circuit area comprising a gate driver; and

a bezel comprising a plurality of link lines configured to connect the gate driver to the plurality of pixels,

wherein the display panel is divided into a rectangular portion and a non-rectangular portion,

wherein a first link line, among the plurality of link lines, in the rectangular portion is a single segment,

wherein a second link line, among the plurality of link lines, in the non-rectangular portion comprises a multi-segmented line comprising a plurality of sub-link lines oriented in different directions in plan view, and

wherein the non-rectangular portion comprises a plurality of dummy gate drivers.

18. The display panel of claim 17, wherein the non-rectangular portion is in each of a lower end portion and an upper end portion of the display panel.

19. The display panel of claim 17, wherein:

a size of the bezel in the rectangular portion is constant; and

a size of the bezel in the non-rectangular portion is not constant.

20. The display panel of claim 19, wherein a curvature of the non-rectangular portion in the circuit area is different from a curvature of the display area.