STACKED-DIE IMAGE SENSORS WITH SHIELDING
First Claim
1. Pixel circuitry for an image pixel, the pixel circuitry comprising:
- a first integrated circuit die; and
a second integrated circuit die mounted to the first integrated circuit die, wherein the image pixel includes a photosensitive element in the first integrated circuit die and includes a floating diffusion region coupled to a gate terminal of a transistor, the transistor being in the first integrated circuit die, and wherein the image pixel includes a pixel output line in the second integrated circuit die.
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Accused Products
Abstract
A stacked-die image sensor may be provided with an array of image pixels. The stacked-die image sensor may include at least first and second integrated circuit dies stacked on top of one another. Some of the pixel circuitry in each pixel may be formed in the first integrated circuit die and some of the pixel circuitry in each pixel may be formed in the second integrated circuit die. Coupling structures such as conductive pads may electrically couple the pixel circuitry in the first integrated circuit die to the pixel circuitry in the second integrated circuit die. A shielding structure may partially or completely surround each conductive pad to reduce parasitic capacitive coupling between adjacent conductive pads. The shielding structure may be a metal wire coupled to a ground voltage. The shielding structure may extend between columns of image pixels and/or between rows of image pixels.
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Citations
20 Claims
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1. Pixel circuitry for an image pixel, the pixel circuitry comprising:
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a first integrated circuit die; and a second integrated circuit die mounted to the first integrated circuit die, wherein the image pixel includes a photosensitive element in the first integrated circuit die and includes a floating diffusion region coupled to a gate terminal of a transistor, the transistor being in the first integrated circuit die, and wherein the image pixel includes a pixel output line in the second integrated circuit die. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. An imaging system comprising:
an array of image pixels, each image pixel having a first portion in a first die and a second portion in a second die that is mounted to the first die, wherein; the first portion of each image pixel includes a source follower transistor, and the second portion of each image pixel includes a pixel output line that is coupled to the source follower transistor. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18, 20)
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19. An array of image pixels, each image pixel comprising:
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a photosensitive element in a first integrated circuit die; a floating diffusion region in the first integrated circuit die; a first transistor that couples the photosensitive element to the floating diffusion region; a second transistor that couples the floating diffusion region to a voltage supply line, the voltage supply line being in the first integrated circuit die; a row select transistor in a second integrated circuit die, the second integrated circuit die stacked on the first integrated circuit die; and a pixel output line coupled to the row select transistor, the pixel outline line being in the second integrated circuit die.
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Specification