METAL-INSULATOR-SEMICONDUCTOR-INSULATOR-METAL (MISIM) DEVICE, METHOD OF OPERATION, AND MEMORY DEVICE INCLUDING THE SAME

• US 20200135809A1
• Filed: 12/23/2019
• Published: 04/30/2020
• Est. Priority Date: 09/29/2017
• Status: Active Grant

• Current Assignee: National Taiwan University (Government of The Republic of China), Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: National Taiwan University (Government of The Republic of China), Taiwan Semiconductor Manufacturing Company Limited
• Inventors: HWU, Jenn-Gwo, LIN, Hao-Hsiung, YAN, Chang-Feng, PAN, Samuel C.
• Granted Patent: US 11,024,674 B2
• Time in Patent Office: Days
• CPC Class Codes: G11C 11/34 using semiconductor devices
• CPC Class Codes: G11C 11/56 using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
• CPC Class Codes: G11C 13/0007 comprising metal oxide memory material, e.g. perovskites
• CPC Class Codes: H01L 29/417 carrying the current to be rectified, amplified or switched
• CPC Class Codes: H01L 29/88 Tunnel-effect diodes
• CPC Class Codes: H10B 99/00 Subject matter not provided for in other groups of this subclass
• CPC Class Codes: H10N 80/10 Gunn-effect devices
• CPC Class Codes: H10N 89/02 Gunn-effect devices

Abstract

A metal-insulator-semiconductor-insulator-metal (MISIM) device includes a semiconductor layer, an insulating layer disposed over an upper surface of the semiconductor layer, a back electrode disposed over a lower surface of the semiconductor layer opposing the upper surface, and first and second electrodes disposed over the insulating layer and spaced-apart from each other.

Claims

1. A metal-insulator-semiconductor-insulator-metal (MISIM) device, comprising:

a semiconductor layer;

an insulating layer disposed over an upper surface of the semiconductor layer;

a back electrode disposed over a lower surface of the semiconductor layer opposing the upper surface; and

first and second electrodes disposed over the insulating layer and spaced-apart from each other,

wherein the first electrode includes a first contact electrode, an inner electrode, and a first connecting electrode connecting the first contact electrode and the first inner electrode to each other, and

the second electrode includes a second contact electrode, an outer electrode partially surrounding the inner electrode of the first electrode, and a second connecting electrode connecting the second contact electrode and the outer electrode to each other.

2. The MISIM device of claim 1, wherein a thickness of the insulating layer is 1 nm to 4 nm.

3. The MISIM device of claim 1, wherein the semiconductor layer is an N-type semiconductor, and the first electrode and the second electrode are made of a material having a flatband voltage V_FB greater than 0.

4. The MISIM device of claim 3, wherein the N-type semiconductor material has a doping concentration of 5·

10¹⁴/cm<sup>−

3</sup> to 5·

10¹⁷/cm<sup>−

3</sup>.

5. The MISIM device of claim 1, wherein the semiconductor layer is a P-type semiconductor, and the first electrode and the second electrode are made of a material having a flatband voltage V_FB less than 0.

6. The MISIM device of claim 5, wherein the P-type semiconductor material has a doping concentration of 5·

10¹⁴/cm<sup>−

3</sup> to 5·

10¹⁷/cm<sup>−

3</sup>.

7. The MISIM device of claim 1, further comprising a substrate,

wherein the back electrode is disposed between the semiconductor layer and the substrate.

8. A metal-insulator-semiconductor-insulator-metal (MISIM) device, comprising:

a semiconductor layer;

an insulating layer disposed over an upper surface of the semiconductor layer;

a back electrode disposed over a lower surface of the semiconductor layer opposing the upper surface; and

first and second electrodes disposed over the insulating layer and spaced-apart from each other,

wherein the first electrode includes a first contact electrode, a first coupling electrode, and a first connecting electrode connecting the first contact electrode and the first coupling electrode to each other,

the second electrode includes a second contact electrode, a second coupling electrode, and a second connecting electrode connecting the second contact electrode and the second coupling electrode to each other, and

the first coupling electrode and the second coupling electrode comprise comb-shaped arrays.

9. The MISIM device of claim 8, wherein a thickness of the insulating layer is 1 nm to 4 nm.

10. The MISIM device of claim 8, wherein the semiconductor layer is an N-type semiconductor, and the first electrode and the second electrode are made of a material having a flatband voltage V_FB greater than 0.

11. The MISIM device of claim 10, wherein the N-type semiconductor material has a doping concentration of 5·

10¹⁴/cm<sup>−

3</sup> to 5·

10¹⁷/cm<sup>−

3</sup>.

12. The MISIM device of claim 8, wherein the semiconductor layer is a P-type semiconductor, and the first electrode and the second electrode are made of a material having a flatband voltage V_FB less than 0.

13. The MISIM device of claim 12, wherein the P-type semiconductor material has a doping concentration of 5·

10¹⁴/cm<sup>−

3</sup> to 5·

10¹⁷/cm<sup>−

3</sup>.

14. The MISIM device of claim 8, further comprising a substrate,

wherein the back electrode is disposed between the semiconductor layer and the substrate.

15. A metal-insulator-semiconductor-insulator-metal (MISIM) device, comprising:

a semiconductor layer;

an insulating layer disposed over an upper surface of the semiconductor layer;

a back electrode disposed over a lower surface of the semiconductor layer opposing the upper surface; and

first and second electrodes disposed over the insulating layer and spaced-apart from each other,

wherein the semiconductor layer is an N-type semiconductor, and the first electrode and the second electrode are made of a material having a flatband voltage V_FB greater than 0;

or

the semiconductor layer is a P-type semiconductor, and the first electrode and the second electrode are made of a material having a flatband voltage V_FB less than 0.

16. The MISIM device of claim 15, wherein a thickness of the insulating layer is 1 nm to 4 nm.

17. The MISIM device of claim 15, wherein the N-type semiconductor is a material having a doping concentration of 5·

10¹⁴/cm<sup>−

3</sup> to 5·

10¹⁷/cm<sup>−

3</sup>.

18. The MISIM device of claim 15, wherein the P-type semiconductor is a material having a doping concentration of 5·

10¹⁴/cm<sup>−

3</sup> to 5·

10¹⁷/cm<sup>−

3</sup>.

19. The MISIM device of claim 15, further comprising a substrate, wherein the back electrode is disposed between the semiconductor layer and the substrate.

20. The MISIM device of claim 15, wherein the first electrode and the second electrode are made of one selected from group consisting of gold, silver, platinum, nickel, aluminum, hafnium, magnesium, and an alloy thereof.