METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE

• US 20200135847A1
• Filed: 04/24/2018
• Published: 04/30/2020
• Est. Priority Date: 07/19/2017
• Status: Active Grant

• Current Assignee: Mitsubishi Electric Corporation
• Original Assignee: Mitsubishi Electric Corporation
• Inventors: KIYOI, Akira
• Granted Patent: US 11,676,996 B2
• Time in Patent Office: Days
• CPC Class Codes: H01L 21/2253 by ion implantation
• CPC Class Codes: H01L 21/228 using diffusion into or out of a solid from or into a liquid phase, e.g. alloy diffusion processes H01L21/221 - H01L21/222 take precedence
• CPC Class Codes: H01L 21/26506 in group IV semiconductors
• CPC Class Codes: H01L 21/26513 of electrically active species
• CPC Class Codes: H01L 21/3221 of silicon bodies, e.g. for gettering
• CPC Class Codes: H01L 29/0615 by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] LDD or drain offset regions H01L29/7833
• CPC Class Codes: H01L 29/0638 for preventing surface leakage due to surface inversion layer, e.g. with channel stopper channel stoppers in combination with isolation region for integrated circuits H01L21/762
• CPC Class Codes: H01L 29/36 characterised by the concentration or distribution of impurities in the bulk material within semiconductor regions H01L29/06
• CPC Class Codes: H01L 29/66136 PN junction diodes
• CPC Class Codes: H01L 29/66348 with a recessed gate
• CPC Class Codes: H01L 29/7396 with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions H01L29/7398 takes precedence
• CPC Class Codes: H01L 29/7397 and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
• CPC Class Codes: H01L 29/78 with field effect produced by an insulated gate H01L29/7725, H01L29/775, H01L29/778 take precedence
• CPC Class Codes: H01L 29/861 Diodes

Abstract

In a step, acceptor ions are implanted from a back surface of a semiconductor substrate. In a step, a wet process of immersing the semiconductor substrate in a chemical solution including hydrofluoric acid is performed, to introduce hydrogen atoms into the semiconductor substrate. In a step, proton radiation is provided to the back surface of the semiconductor substrate, to introduce hydrogen atoms into the semiconductor substrate and form radiation-induced defects. In a step, an annealing process is performed on the semiconductor substrate, to form hydrogen-related donors by reaction of the hydrogen atoms and the radiation-induced defects and reduce the radiation-induced defects.

Claims

1. A method of manufacturing a semiconductor device, comprising:

forming a semiconductor element in a semiconductor substrate having a first main surface and a second main surface and being of a first conductivity type having a first carrier concentration, the semiconductor element being for conducting a current between the first main surface and the second main surface,

the forming a semiconductor element including

implanting acceptor ions from the second main surface of the semiconductor substrate,

performing, from the second main surface of the semiconductor substrate, a wet process of accumulating hydrogen atoms in a region of the semiconductor substrate where the acceptor ions are implanted,

providing radiation of charged particles from the second main surface of the semiconductor substrate, and

after the performing a wet process and the providing radiation of charged particles, performing an annealing process on the semiconductor substrate, to form a field stop layer of the first conductivity type having a second carrier concentration higher than the first carrier concentration in the semiconductor substrate.

2. The method of manufacturing a semiconductor device according to claim 1, wherein

in the implanting acceptor ions, ions of a Group 13 element are implanted as the acceptor ions.

3. The method of manufacturing a semiconductor device according to claim 1, wherein

in the performing a wet process, a chemical solution including hydrofluoric acid is used.

4. The method of manufacturing a semiconductor device according to claim 1, wherein

in the providing radiation of charged particles, radiation of protons as the charged particles is provided under a condition that a dose amount is from 5×

10¹¹/cm² to 1×

10¹⁵/cm².

5. The method of manufacturing a semiconductor device according to claim 1, wherein

in the providing radiation of charged particles, radiation of helium ions as the charged particles is provided under a condition that a dose amount is from 5×

10¹⁰/cm² to 1×

10¹⁴/cm².

6. The method of manufacturing a semiconductor device according to claim 1, wherein

in the performing an annealing process, the annealing process is performed for an annealing time from 0.5 hours to 5 hours at an annealing temperature from 300°

C. to 500°

C. in an inert gas atmosphere.

7. The method of manufacturing a semiconductor device according to claim 1, wherein

the forming a semiconductor element includes forming an IGBT, the forming an IGBT including forming a collector layer of a second conductivity type in a region from the second main surface of the semiconductor substrate to the field stop layer.

8. The method of manufacturing a semiconductor device according to claim 1, wherein

the forming a semiconductor element includes forming a diode, the forming a diode including implanting donor ions from the second main surface of the semiconductor substrate to form a cathode layer of the first conductivity type in a region from the second main surface of the semiconductor substrate to the field stop layer.

9. A semiconductor device comprising a semiconductor element that conducts a current between a first main surface and a second main surface of a semiconductor substrate of a first conductivity type, the semiconductor device comprising:

an impurity region formed to a first depth from the second main surface of the semiconductor substrate having a first carrier concentration; and

a field stop layer of the first conductivity type, formed from a position of the first depth to a second depth deeper than the first depth in the semiconductor substrate, and having a second carrier concentration higher than the first carrier concentration in the semiconductor substrate,

in the field stop layer,

a maximum value of the second carrier concentration being located between the first depth and the second depth,

the second carrier concentration exhibiting a distribution in which the second carrier concentration decreases toward the second main surface from a portion where the maximum value of the second carrier concentration is located,

concentration of radiation-induced defects remaining in the field stop layer being lower than the first carrier concentration in the semiconductor substrate, and

hydrogen atoms being accumulated in the impurity region.

10. The semiconductor device according to claim 9, wherein

the concentration of radiation-induced defects remaining in the field stop layer is one-hundredth or less of the first carrier concentration in the semiconductor substrate.

11. The semiconductor device according to claim 9, wherein

the hydrogen atoms have a distribution in which concentration of the hydrogen atoms decreases continuously from a surface of the impurity region toward a boundary between the impurity region and the field stop layer.

12. The semiconductor device according to claim 9, wherein

the semiconductor element includes an IGBT, and

the impurity region is a collector layer of a second conductivity type.

13. The semiconductor device according to claim 9, wherein

the semiconductor element includes a diode, and

the impurity region is a cathode layer of the first conductivity type.