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Strained Nanowire CMOS Device and Method of Forming

  • US 20200135854A1
  • Filed: 12/20/2019
  • Published: 04/30/2020
  • Est. Priority Date: 10/07/2015
  • Status: Active Grant
First Claim
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1. A method of forming a semiconductor device, the method comprising:

  • forming a first fin and a second fin, each of the first fin and the second fin comprising alternating first semiconductor material layers and second semiconductor material layers;

    forming a dummy gate structure over the first fin and the second fin;

    forming a first dielectric layer over the first fin and the second fin;

    removing a first portion the dummy gate structure to form a first recess, the first recess exposing a first channel region of the first fin;

    removing at least a portion of the second semiconductor material layers in the first channel region of the first fin;

    forming a second dielectric layer over the first channel region of the first fin;

    removing a second portion of the dummy gate structure to form a second recess, the second recess exposing a second channel region of the second fin;

    removing at least a portion of the first semiconductor material layers in the second channel region of the second fin; and

    forming a gate electrode over the first channel region and the second channel region.

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