AREA SELECTIVE CYCLIC DEPOSITION FOR VFET TOP SPACER
First Claim
1. A method for forming a semiconductor device, the method comprising:
- forming a first semiconductor fin over a substrate;
forming a second semiconductor fin over the substrate and adjacent to the first semiconductor fin;
forming a dielectric isolation region between the first semiconductor fin and the second semiconductor fin; and
forming a top spacer between the first semiconductor fin and the second semiconductor fin by cyclically depositing dielectric layers over the dielectric isolation region;
wherein the dielectric layers are inhibited from depositing on a surface of the first semiconductor fin and on a surface of the second semiconductor fin.
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Abstract
Embodiments of the present invention are directed to techniques for forming a vertical field effect transistor (VFET) top spacer using an area selective cyclic deposition. In a non-limiting embodiment of the invention, a first semiconductor fin is formed over a substrate. A second semiconductor fin is formed over the substrate and adjacent to the first semiconductor fin. A dielectric isolation region is formed between the first semiconductor fin and the second semiconductor fin. A top spacer is formed between the first semiconductor fin and the second semiconductor fin by cyclically depositing dielectric layers over the dielectric isolation region. The dielectric layers are inhibited from depositing on a surface of the first semiconductor fin and on a surface of the second semiconductor fin during the cyclic deposition process.
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Citations
20 Claims
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1. A method for forming a semiconductor device, the method comprising:
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forming a first semiconductor fin over a substrate; forming a second semiconductor fin over the substrate and adjacent to the first semiconductor fin; forming a dielectric isolation region between the first semiconductor fin and the second semiconductor fin; and forming a top spacer between the first semiconductor fin and the second semiconductor fin by cyclically depositing dielectric layers over the dielectric isolation region; wherein the dielectric layers are inhibited from depositing on a surface of the first semiconductor fin and on a surface of the second semiconductor fin. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method for forming a semiconductor device, the method comprising:
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forming a first semiconductor fin over a substrate; forming a second semiconductor fin over the substrate and adjacent to the first semiconductor fin; forming a conductive gate over a channel region of the first semiconductor fin and over a channel region of the second semiconductor fin; forming a dielectric isolation region between the first semiconductor fin and the second semiconductor fin, the dielectric isolation region between opposite sidewalls of the conductive gate; and selectively depositing a dielectric material on a surface of the dielectric isolation region. - View Dependent Claims (11, 12, 13, 14, 15)
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16. A semiconductor device comprising:
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a first semiconductor fin over a substrate; a second semiconductor fin over the substrate and adjacent to the first semiconductor fin; a dielectric isolation region between the first semiconductor fin and the second semiconductor fin; and a top spacer between the first semiconductor fin and the second semiconductor fin, the top spacer comprising cyclically deposited dielectric layers. - View Dependent Claims (17, 18, 19, 20)
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Specification