APPARATUS AND CIRCUITS INCLUDING TRANSISTORS WITH DIFFERENT GATE STACK MATERIALS AND METHODS OF FABRICATING THE SAME

• US 20200135910A1
• Filed: 09/19/2019
• Published: 04/30/2020
• Est. Priority Date: 10/31/2018
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: CHERN, Chan-Hong
• Granted Patent: US 11,189,719 B2
• Time in Patent Office: Days
• CPC Class Codes: H01L 21/0254 Nitrides
• CPC Class Codes: H01L 21/8252 the substrate being a semiconductor, using III-V technology H01L21/8258 takes precedence
• CPC Class Codes: H01L 27/0605 integrated circuits made of compound material, e.g. AIIIBV
• CPC Class Codes: H01L 27/085 including field-effect components only
• CPC Class Codes: H01L 29/0843 Source or drain regions of field-effect devices
• CPC Class Codes: H01L 29/1066 Gate region of field-effect devices with PN junction gate
• CPC Class Codes: H01L 29/2003 Nitride compounds
• CPC Class Codes: H01L 29/205 in different semiconductor regions , e.g. heterojunctions
• CPC Class Codes: H01L 29/207 further characterised by the doping material H01L29/2006 takes precedence
• CPC Class Codes: H01L 29/42316 for field-effect transistors
• CPC Class Codes: H01L 29/66462 with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
• CPC Class Codes: H01L 29/7786 with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
• CPC Class Codes: H01L 29/7787 with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET
• CPC Class Codes: H03K 17/162 without feedback from the output circuit to the control circuit
• CPC Class Codes: H03K 17/6877 the control circuit comprising active elements different from those used in the output circuit

Abstract

Apparatus and circuits including transistors with different gate stack materials and methods of fabricating the same are disclosed. In one example, a semiconductor structure is disclosed. The semiconductor structure includes: a substrate; a channel layer formed over the substrate; a first transistor formed over the channel layer, wherein the first transistor comprises a first source region, a first drain region, a first gate structure, and a first polarization modulation portion under the first gate structure; and a second transistor formed over the channel layer, wherein the second transistor comprises a second source region, a second drain region, a second gate structure, and a second polarization modulation portion under the second gate structure, wherein the first polarization modulation portion is made of a material different from that of the second polarization modulation portion.

Claims

1. A semiconductor structure, comprising:

a substrate;

a channel layer formed over the substrate;

a first transistor formed over the channel layer, wherein the first transistor comprises a first source region, a first drain region, a first gate structure, and a first polarization modulation portion under the first gate structure; and

a second transistor formed over the channel layer, wherein the second transistor comprises a second source region, a second drain region, a second gate structure, and a second polarization modulation portion under the second gate structure, wherein the first polarization modulation portion is made of a material different from that of the second polarization modulation portion.

2. The semiconductor structure of claim 1, wherein:

the first transistor and the second transistor are high electron mobility transistors to be used in a same multi-stage driver circuit.

3. The semiconductor structure of claim 1, wherein:

the first transistor has a first threshold voltage; and

the second transistor has a second threshold voltage that is lower than the first threshold voltage.

4. The semiconductor structure of claim 3, wherein:

the first polarization modulation portion comprises gallium nitride (GaN) doped by a first doping material;

the second polarization modulation portion comprises GaN doped by a second doping material; and

the first polarization modulation portion has a different work function than the second polarization modulation portion.

5. The semiconductor structure of claim 4, wherein:

the first doping material is magnesium (Mg); and

the second doping material is beryllium (Be).

6. The semiconductor structure of claim 1, wherein:

each of the first polarization modulation portion and the second polarization modulation portion comprises gallium nitride (GaN) doped by at least one p-type doping material selected from column I and column II elements.

7. The semiconductor structure of claim 1, further comprising an active layer disposed on the channel layer, wherein:

the channel layer comprises a first III-V semiconductor material; and

the active layer comprises a second III-V semiconductor material that is different from the first HI-V semiconductor material.

8. The semiconductor structure of claim 7, wherein:

the first HI-V semiconductor material comprises gallium nitride (GaN); and

the second III-V semiconductor material comprises aluminum gallium nitride (AlGaN).

9. A circuit, comprising:

a first transistor including a first gate, a first source, a first drain and a first polarization modulation portion under the first gate; and

a second transistor including a second gate, a second source, a second drain and a second polarization modulation portion under the second gate, wherein;

the first transistor and the second transistor are formed on a same semiconductor wafer, and

the first polarization modulation portion is made of a material different from that of the second polarization modulation portion.

10. The circuit of claim 9, wherein:

the first transistor has a first threshold voltage; and

the second transistor has a second threshold voltage that is different from the first threshold voltage.

11. The circuit of claim 9, wherein:

at least one of the first source and the first drain is electrically connected to a ground voltage; and

at least one of the second source and the second drain is electrically connected to a positive supply voltage.

12. The circuit of claim 11, wherein:

the first threshold voltage is different from the second threshold voltage.

13. The circuit of claim 12, wherein:

the first polarization modulation portion comprises gallium nitride (GaN) doped by a first doping material;

the second polarization modulation portion comprises GaN doped by a second doping material; and

the first polarization modulation portion has a lower work function than the second polarization modulation portion.

14. The circuit of claim 12, wherein:

at least one of the first source and the first drain is electrically connected to an output pin of the circuit.

15. The circuit of claim 12, wherein the first transistor is at least one of:

a high voltage enhancement-mode high electron mobility transistor (HV E-HEMT);

a low voltage enhancement-mode high electron mobility transistor (LV E-HEMT); and

a low voltage depletion-mode high electron mobility transistor (LV D-HEMT).

16. The circuit of claim 12, wherein the second transistor is a low voltage enhancement-mode high electron mobility transistor (LV E-HEMT).

17. The circuit of claim 9, wherein the first gate is physically coupled to the second source.

18. A method for forming a semiconductor structure, comprising:

forming a channel layer over a substrate;

forming a first transistor over the channel layer, wherein the first transistor comprises a first source region, a first drain region, a first gate structure, and a first polarization modulation portion under the first gate structure; and

forming a second transistor over the channel layer, wherein the second transistor comprises a second source region, a second drain region, a second gate structure, and a second polarization modulation portion under the second gate structure, wherein the first polarization modulation portion is made of a material different from that of the second polarization modulation portion.

19. The method of claim 18, wherein:

the first transistor and the second transistor are high electron mobility transistors to be used in a same multi-stage driver circuit;

the first transistor has a first threshold voltage;

the second transistor has a second threshold voltage that is different from the first threshold voltage; and

the first polarization modulation portion is made of a material having a different work function than that of a material of the second polarization modulation portion.

20. The method of claim 18, further comprising:

forming an active layer on the channel layer;

defining a first opening on a mask covering the active layer;

forming the first polarization modulation portion in the first opening;

defining a second opening on the mask; and

forming the second polarization modulation portion in the second opening.