THIN-FILM TRANSISTOR SUBSTRATE, LIQUID CRYSTAL DISPLAY DEVICE INCLUDING THE SAME, AND METHOD FOR PRODUCING THIN-FILM TRANSISTOR SUBSTRATE

• US 20200135933A1
• Filed: 10/24/2019
• Published: 04/30/2020
• Est. Priority Date: 10/30/2018
• Status: Active Grant

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: MISAKI, Katsunori
• Granted Patent: US 10,804,406 B2
• Time in Patent Office: Days
• CPC Class Codes: G02F 1/13458 Terminal pads
• CPC Class Codes: G02F 1/136227 Through-hole connection of the pixel electrode to the active element through an insulation layer
• CPC Class Codes: G02F 1/13629 Multilayer wirings
• CPC Class Codes: G02F 1/136295 Materials; Compositions; Manufacture processes
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: H01L 2029/42388 characterised by the shape of the insulating material
• CPC Class Codes: H01L 21/02343 treatment by exposure to a liquid
• CPC Class Codes: H01L 21/441 Deposition of conductive or insulating materials for electrodes
• CPC Class Codes: H01L 21/465 Chemical or electrical treatment, e.g. electrolytic etching to form insulating layers H01L21/469
• CPC Class Codes: H01L 21/471 Inorganic layers H01L21/475, H01L21/4757 take precedence
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/127 with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/45 Ohmic electrodes
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

The present invention provides a thin-film transistor substrate including a base substrate and a thin-film transistor, the thin-film transistor including: a gate electrode; a gate insulating layer; a source electrode and a drain electrode; and an oxide semiconductor layer in this order. The source electrode and the drain electrode each include a first conductive layer and a second conductive layer covering the first conductive layer. The second conductive layer contains at least one element selected from the group consisting of molybdenum, tantalum, tungsten, and nickel. The gate insulating layer in a region between the source electrode and the drain electrode has a smaller thickness than in a region below the source electrode and in a region below the drain electrode.

Claims

1. A thin-film transistor substrate comprising a base substrate and a thin-film transistor,

the thin-film transistor including:

a gate electrode disposed on the base substrate;

a gate insulating layer covering the gate electrode;

a source electrode and a drain electrode facing each other and disposed above the gate electrode via the gate insulating layer; and

an oxide semiconductor layer which faces the gate electrode via at least the gate insulating layer and whose first end and second end respectively overlap the source electrode and the drain electrode and are thereby respectively connected to the source electrode and the drain electrode,

the source electrode and the drain electrode each including a first conductive layer and a second conductive layer covering the first conductive layer,

the second conductive layer containing at least one element selected from the group consisting of molybdenum, tantalum, tungsten, and nickel,

the gate insulating layer in a region between the source electrode and the drain electrode having a smaller thickness than in a region below the source electrode and in a region below the drain electrode.

2. The thin-film transistor substrate according to claim 1,

wherein the thin-film transistor includes no etching stopper layer on the source electrode and on the drain electrode, and

the oxide semiconductor layer faces the gate electrode via the gate insulating layer.

3. The thin-film transistor substrate according to claim 1,

wherein the thin-film transistor further includes an etching stopper layer on the source electrode and on the drain electrode,

the thin-film transistor substrate further comprises a protective insulating layer covering the thin-film transistor and a conductive layer disposed on the protective insulating layer and connected to the drain electrode via a first contact hole in the etching stopper layer and in the protective insulating layer,

the etching stopper layer covers the source electrode except for a connection portion between the oxide semiconductor layer and the source electrode and covers the drain electrode except for a connection portion between the oxide semiconductor layer and the drain electrode and a connection portion between the conductive layer and the drain electrode, and

the connection portion between the oxide semiconductor layer and the source electrode and the connection portion between the oxide semiconductor layer and the drain electrode are located in a region with the gate electrode.

4. The thin-film transistor substrate according to claim 3,

wherein the etching stopper layer is not present in a region between the oxide semiconductor layer and the gate insulating layer, and

the oxide semiconductor layer faces the gate electrode via the gate insulating layer.

5. The thin-film transistor substrate according to claim 3,

wherein the etching stopper layer is present in a region between the oxide semiconductor layer and the gate insulating layer, and

the oxide semiconductor layer is connected to the source electrode via a second contact hole in the etching stopper layer and connected to the drain electrode via a third contact hole in the etching stopper layer.

6. The thin-film transistor substrate according to claim 5,

wherein the second contact hole overlaps an end of the source electrode and the gate insulating layer in a part adjacent to the end of the source electrode,

the third contact hole overlaps an end of the drain electrode and the gate insulating layer in a part adjacent to the end of the drain electrode, and

the gate insulating layer in a region between the source electrode and the drain electrode and below the etching stopper layer has a greater thickness than in a region below the second contact hole and in a region below the third contact hole.

7. The thin-film transistor substrate according to claim 5,

wherein the second contact hole overlaps an end of the source electrode but does not overlap the gate insulating layer,

the third contact hole overlaps an end of the drain electrode but does not overlap the gate insulating layer, and

the gate insulating layer in a region between the source electrode and the drain electrode and below the etching stopper layer has a smaller thickness than in a region below the source electrode and in a region below the drain electrode.

8. The thin-film transistor substrate according to claim 1,

wherein the first conductive layer is a laminate including a lower layer, a middle layer, and an upper layer stacked in the stated order from a base substrate side,

the middle layer contains aluminum or copper, and

the lower layer and the upper layer each contain titanium or molybdenum nitride.

9. The thin-film transistor substrate according to claim 1,

wherein the second conductive layer contains at least one substance selected from the group consisting of molybdenum, molybdenum nitride, a molybdenum alloy, a nitride of the molybdenum alloy, tantalum, tantalum nitride, a tantalum alloy, a nitride of the tantalum alloy, tungsten, tungsten nitride, a tungsten alloy, a nitride of the tungsten alloy, nickel, nickel nitride, a nickel alloy, and a nitride of the nickel alloy.

10. The thin-film transistor substrate according to claim 1,

wherein the oxide semiconductor layer includes an indium gallium zinc oxide-based oxide semiconductor.

11. A liquid crystal display device comprising:

the thin-film transistor substrate according to claim 1;

a counter substrate facing the thin-film transistor substrate; and

a liquid crystal layer disposed between the thin-film transistor substrate and the counter substrate.

12. A method for producing a thin-film transistor substrate, comprising in the following order:

first patterning including forming a gate electrode conductive film on a base substrate and patterning the gate electrode conductive film using a first photomask to form a gate electrode;

formation of a gate insulating layer including forming a gate insulating layer so as to cover the gate electrode;

second patterning including forming a first conductive film so as to cover the gate insulating layer and patterning the first conductive film using a second photomask;

third patterning including forming a second conductive film containing at least one element selected from the group consisting of molybdenum, tantalum, tungsten, and nickel and patterning the second conductive film using a third photomask to form a source electrode and a drain electrode;

hydrofluoric acid treatment including treating a gate insulating layer side surface of the base substrate with hydrofluoric acid; and

fourth patterning including forming an oxide semiconductor film so as to cover the source electrode and the drain electrode and patterning the oxide semiconductor film using a fourth photomask to form an oxide semiconductor layer.

13. The method for producing a thin-film transistor substrate according to claim 12, further comprising, between the hydrofluoric acid treatment and the fourth patterning, fifth patterning including forming an insulating film so as to cover the source electrode and the drain electrode and patterning the insulating film using a fifth photomask to form an etching stopper layer.

14. The method for producing a thin-film transistor substrate according to claim 13, further comprising, between the fifth patterning and the fourth patterning, second hydrofluoric acid treatment including treating the gate insulating layer side surface of the base substrate with hydrofluoric acid.

15. The method for producing a thin-film transistor substrate according to claim 12,

wherein the second conductive film is a conductive film containing at least one substance selected from the group consisting of molybdenum, molybdenum nitride, a molybdenum alloy, a nitride of the molybdenum alloy, tantalum, tantalum nitride, a tantalum alloy, a nitride of the tantalum alloy, tungsten, tungsten nitride, a tungsten alloy, a nitride of the tungsten alloy, nickel, nickel nitride, a nickel alloy, and a nitride of the nickel alloy.

16. The method for producing a thin-film transistor substrate according to claim 12,

wherein the oxide semiconductor film is an indium gallium zinc oxide-based oxide semiconductor.