MAGNETIC TUNNEL JUNCTION STRUCTURES AND RELATED METHODS
First Claim
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1. A method, comprising:
- forming a first heavy metal layer over a substrate;
depositing a dielectric material over the first heavy metal layer;
forming a second heavy metal layer over the dielectric material and the first heavy metal layer; and
diffusing elements of the dielectric material into one or more of the first heavy metal layer or the second heavy metal layer.
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Abstract
The disclosure is directed to spin-orbit torque (“SOT”) magnetoresistive random-access memory (“MRAM”) (“SOT-MRAM”) structures and methods. A SOT channel of the SOT-MRAM includes multiple heavy metal layers and one or more dielectric dusting layers each sandwiched between two adjacent heavy metal layers. The dielectric dusting layers each include discrete molecules or discrete molecule clusters of a dielectric material scattered in or adjacent to an interface between two adjacent heavy metal layers.
9 Citations
20 Claims
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1. A method, comprising:
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forming a first heavy metal layer over a substrate; depositing a dielectric material over the first heavy metal layer; forming a second heavy metal layer over the dielectric material and the first heavy metal layer; and diffusing elements of the dielectric material into one or more of the first heavy metal layer or the second heavy metal layer. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A structure, comprising:
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a magnetic tunnel junction structure including a reference layer, a free layer and a tunneling barrier layer sandwiched between the reference layer and the free layer; and a spin-orbit torque layer adjacent to the free layer of the magnetic tunnel junction structure, the spin-orbit torque layer including a first heavy metal layer, a second heavy metal layer and a first dielectric layer sandwiched between the first heavy metal layer and the second heavy metal layer. - View Dependent Claims (9, 10, 11, 12, 13)
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14. A memory device, comprising:
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a substrate; a transistor over the substrate, the transistor having a first source/drain terminal, a second source/drain terminal and a gate terminal; a magnetoresistive random access memory cell over the transistor, the magnetoresistive random access memory cell including a magnetic tunnel junction structure and a spin-orbit torque structure adjacent to the magnetic tunnel junction structure; a write signal line coupled to the gate terminal; a first current node coupled to the first source/drain terminal; a first end of the spin-orbit torque structure coupled to the second source/drain terminal; and a second end of the spin-orbit torque structure coupled to a second current node, wherein the spin-orbit torque structure includes a first heavy metal layer, a second heavy metal layer stacked over the first heavy metal layer, and a first plurality of molecules of a dielectric material scattered adjacent to an interface between the first heavy metal layer and the second heavy metal layer. - View Dependent Claims (15, 16, 17, 18, 19, 20)
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Specification