BAR-TYPE MAGNETORESISTIVE RANDOM ACCESS MEMORY CELL
First Claim
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1. An integrated circuit, comprising:
- a magnetoresistive random access memory cell comprising;
a bar-type magnetic tunnel junction, havinga reference layer including a first magnetizable material,a free layer including a second magnetizable material, anda barrier layer between the reference layer and the free layer;
an antiferromagnetic layer over the free layer; and
a spacer contacting a sidewall of the reference layer and a sidewall of the antiferromagnetic layer.
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Abstract
A magnetoresistive random access memory (MRAM) cell includes a bar-type magnetic tunneling junction (MTJ), where the antiferromagnetic layer, the free layer, the barrier layer, and the reference layer have substantially aligned sidewalls. A spacer is against the sidewall of each of the antiferromagnetic layer, the free layer, the barrier layer, and the reference layer. A bar-type MTJ is manufactured from a single element of a pattern for isolated MTJs for MRAM cells. A barrier layer of a bar-type MTJ has a larger area than column-type MTJs, leading to extended MRAM cell lifetime because the barrier layer has a lower tunneling current density across the barrier layer.
9 Citations
20 Claims
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1. An integrated circuit, comprising:
a magnetoresistive random access memory cell comprising; a bar-type magnetic tunnel junction, having a reference layer including a first magnetizable material, a free layer including a second magnetizable material, and a barrier layer between the reference layer and the free layer; an antiferromagnetic layer over the free layer; and a spacer contacting a sidewall of the reference layer and a sidewall of the antiferromagnetic layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method of making an integrated circuit, comprising depositing a first ferromagnetic material over a substrate;
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applying a first magnetic field to the first ferromagnetic material; annealing the first ferromagnetic material while applying the first magnetic field to the first ferromagnetic material to set a magnetic field orientation in the first ferromagnetic material; depositing barrier material over the first ferromagnetic layer; depositing a second ferromagnetic material over the barrier material; depositing an antiferromagnetic material over the second ferromagnetic material; and etching the first ferromagnetic material, the barrier material, the second ferromagnetic material to define a magnetic tunneling junction, and the antiferromagnetic material, wherein the etching comprises defining a sidewall of the antiferromagnetic material aligned with a sidewall of the first ferromagnetic material. - View Dependent Claims (11, 12, 13, 14, 15, 16)
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17. An integrated circuit, comprising:
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a magnetic tunneling junction, having a reference layer, a free layer, and a barrier layer between the reference layer and the free layer, wherein an interface between the barrier layer and the free layer has a first area; and an antiferromagnetic layer over the free layer, wherein an interface of the antiferromagnetic layer and the free layer has a second area equal to the first area, wherein a first magnetic tunneling junction sidewall (MTJ sidewall) extends along a first antiferromagnetic layer sidewall (AFL sidewall) for at least half of a length of the magnetic tunneling junction. - View Dependent Claims (18, 19, 20)
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Specification