MAGNETORESISTIVE RANDOM ACCESS MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME

• US 20200136020A1
• Filed: 12/27/2019
• Published: 04/30/2020
• Est. Priority Date: 10/25/2017
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: PARK, Yong-Sung, KIM, Woo-Jin, PARK, Jeong-Heon, OH, Se-Chung, LEE, Joon-Myoung, CHO, Hyun
• Granted Patent: US 10,714,678 B2
• Time in Patent Office: Days
• CPC Class Codes: H10B 61/00 Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
• CPC Class Codes: H10B 61/10 comprising components having two electrodes, e.g. diodes or MIM elements
• CPC Class Codes: H10B 61/22 of the field-effect transistor [FET] type
• CPC Class Codes: H10N 50/01 Manufacture or treatment
• CPC Class Codes: H10N 50/80 Constructional details
• CPC Class Codes: H10N 50/85 Magnetic active materials

Abstract

The methods of manufacturing an MRAM device and MRAM devices are provided. The methods may include forming a first electrode on an upper surface of a substrate, forming a first magnetic layer on the first electrode, forming a tunnel barrier structure on the first magnetic layer, forming a second magnetic layer on the tunnel barrier structure, and forming a second electrode on the second magnetic layer. The tunnel barrier structure may include a first tunnel barrier layer and a second tunnel barrier layer that are sequentially stacked on the first magnetic layer and may have different resistivity distributions from each other along a horizontal direction that may be parallel to the upper surface of the substrate.

Claims

1. An MRAM device comprising:

a first electrode on an upper surface of a substrate;

a first magnetic layer on the first electrode;

a tunnel barrier structure on the first magnetic layer, the tunnel barrier structure including a first tunnel barrier layer and a second tunnel barrier layer that are sequentially stacked on the first magnetic layer and have different resistivity distributions from each other along a horizontal direction that is parallel to the upper surface of the substrate;

a second magnetic layer on the tunnel barrier structure; and

a second electrode on the second magnetic layer.

2. The MRAM device of claim 1, wherein both the first and second tunnel barrier layers comprise a metal oxide including a same metal element, and the first and second tunnel barrier layers are formed under different process conditions.

3. The MRAM device of claim 1, wherein the substrate comprises a central portion, an edge portion that is spaced apart from the central portion in the horizontal direction and an intermediate portion between the central portion and the edge portion,

wherein the first tunnel barrier layer comprises a first central portion on the central portion of the substrate, a first intermediate portion on the intermediate portion of the substrate, and a first edge portion on the edge portion of the substrate,

wherein the second tunnel barrier layer comprises a second central portion on the central portion of the substrate, a second intermediate portion on the intermediate portion of the substrate, and a second edge portion on the edge portion of the substrate,

wherein the first tunnel barrier layer has a first resistivity distribution in which an average resistivity of the first central portion is lower than an average resistivity of the first intermediate portion, and

wherein the second tunnel barrier layer has a second resistivity distribution in which an average resistivity of the second central portion is higher than an average resistivity of the second edge portion.

4. The MRAM device of claim 3, wherein the first tunnel barrier layer comprises a plurality of first tunnel barrier layers, and the second tunnel barrier layer comprises a plurality of second tunnel barrier layers, and

wherein the plurality of first tunnel barrier layers and the plurality of second tunnel barrier layers are alternately stacked on each other.

5. The MRAM device of claim 1, wherein the substrate comprises a central portion, an edge portion that is spaced apart from the central portion in the horizontal direction and an intermediate portion between the central portion and the edge portion,

wherein the first tunnel barrier layer comprises a first central portion on the central portion of the substrate, a first intermediate portion on the intermediate portion of the substrate, and a first edge portion on the edge portion of the substrate,

wherein the second tunnel barrier layer comprises a second central portion on the central portion of the substrate, a second intermediate portion on the intermediate portion of the substrate, and a second edge portion on the edge portion of the substrate,

wherein the first tunnel barrier layer has a second resistivity distribution in which an average resistivity of the first central portion is higher than an average resistivity of the first edge portion, and

wherein the second tunnel barrier layer has a third resistivity distribution in which an average resistivity of the second central portion is lower than an average resistivity of the second edge portion.

6. The MRAM device of claim 1, wherein the tunnel barrier structure further comprise a third tunnel barrier layer on the second tunnel barrier layer that extends between the first tunnel barrier layer and the third tunnel barrier layer,

wherein the substrate comprises a central portion, an edge portion that is spaced apart from the central portion in the horizontal direction and an intermediate portion between the central portion and the edge portion,

wherein the first tunnel barrier layer comprises a first central portion on the central portion of the substrate, a first intermediate portion on the intermediate portion of the substrate, and a first edge portion on the edge portion of the substrate,

wherein the second tunnel barrier layer comprises a second central portion on the central portion of the substrate, a second intermediate portion on the intermediate portion of the substrate, and a second edge portion on the edge portion of the substrate,

wherein the third tunnel barrier layer comprises a third central portion on the central portion of the substrate, a third intermediate portion on the intermediate portion of the substrate, and a third edge portion on the edge portion of the substrate,

wherein the first tunnel barrier layer has a first resistivity distribution in which an average resistivity of the first central portion is lower than an average resistivity of the first intermediate portion,

wherein the second tunnel barrier layer has a second resistivity distribution in which an average resistivity of the second central portion is higher than an average resistivity of the second edge portion, and

wherein the third tunnel barrier layer has a third resistivity distribution in which an average resistivity of the third central portion is lower than an average resistivity of the third edge portion.

7. The MRAM device of claim 1, further comprising a metal layer between the first and second tunnel barrier layers.

8. The MRAM device of claim 7, wherein the metal layer comprises aluminum, magnesium, titanium, tantalum, CoFeB, tungsten, hafnium, gold, silver, iridium, platinum, ruthenium, cobalt, and/or iron.