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Under-Cut Via Electrode for Sub 60nm Etchless MRAM Devices by Decoupling the Via Etch Process

  • US 20200136021A1
  • Filed: 12/27/2019
  • Published: 04/30/2020
  • Est. Priority Date: 06/14/2018
  • Status: Active Grant
First Claim
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1. A device comprising:

  • a bottom electrode having a top surface;

    a tapered conductive via disposed over the bottom electrode, the tapered conductive via having a first tapered sidewall and an opposing second tapered sidewall and a top surface extending from the first tapered sidewall to the second tapered sidewall;

    a stack of magnetic tunneling junction (MTJ) layers that includes a first portion disposed directly on the top surface of the conductive via and a second portion disposed directly on the top surface of the bottom electrode, wherein the first portion of the stack of the MTJ layers is discontinuous with respect to the second portion of the stack of the MTJ layers; and

    a top electrode disposed directly over the first portion of the stack of the MTJ layers and directly over the second portion of the stack of the MTJ layers.

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