Multiply Spin-Coated Ultra-Thick Hybrid Hard Mask for Sub 60nm MRAM Devices

• US 20200136030A1
• Filed: 12/27/2019
• Published: 04/30/2020
• Est. Priority Date: 02/19/2018
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Yang, Yi, Wang, Yu-Jen
• Granted Patent: US 11,329,218 B2
• Time in Patent Office: Days
• CPC Class Codes: G11C 11/15 using multiple magnetic layers G11C11/155 takes precedence
• CPC Class Codes: G11C 11/161 details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
• CPC Class Codes: H01L 21/0332 characterised by their composition, e.g. multilayer masks, materials
• CPC Class Codes: H01L 21/0337 characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
• CPC Class Codes: H10B 61/00 Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
• CPC Class Codes: H10N 50/01 Manufacture or treatment
• CPC Class Codes: H10N 50/10 Magnetoresistive devices

Abstract

A metal hard mask layer is deposited on a MTJ stack on a substrate. A hybrid hard mask is formed on the metal hard mask layer, comprising a plurality of spin-on carbon layers alternating with a plurality of spin-on silicon layers wherein a topmost layer of the hybrid hard mask is a silicon layer. A photo resist pattern is formed on the hybrid hard mask. First, the topmost silicon layer of the hybrid hard mask is etched where is it not covered by the photo resist pattern using a first etching chemistry. Second, the hybrid hard mask is etched where it is not covered by the photo resist pattern wherein the photoresist pattern is etched away using a second etch chemistry. Thereafter, the metal hard mask and MTJ stack are etched where they are not covered by the hybrid hard mask to form a MTJ device and overlying top electrode.

Claims

1. A method comprising:

forming a stack of magnetic tunnel junction (MTJ) layers over a substrate;

forming a metal hard mask layer on the stack of MTJ layers;

forming a dielectric layer on the metal hard mask layer;

forming a hybrid mask layer on the dielectric layer, wherein the hybrid mask layers includes;

a first carbon-containing layer;

a first silicon-containing layer disposed on the first carbon-containing layer, the first silicon-containing layer having a first thickness;

a second carbon-containing layer disposed on the first silicon-containing layer; and

a second silicon-containing layer disposed on the second carbon-containing layer, the second silicon-containing layer having a second thickness that is different than first thickness;

patterning the second silicon-containing layer via a first process;

patterning the second carbon-containing layer, the first silicon-containing layer and the first carbon-containing layer via a second process; and

patterning the dielectric layer, the metal hard mask layer and the stack of MTJ layers via a third process.

2. The method of claim 1, wherein the second thickness is greater than the first thickness.

3. The method of claim 1, wherein the first process is a first etching process and the second process is a second etching process that is different from the first etching process.

4. The method of claim 1, wherein the first process includes performing a reactive ion etching process.

5. The method of claim 4, wherein the reactive ion etching process includes a fluorine carbon based plasma.

6. The method of claim 5, wherein the fluorine carbon based plasma includes a material selected from the group consisting of CF₄, CHF₃ and C₄F₈.

7. The method of claim 5, wherein the reactive ion etching process further includes O₂ added to the fluorine carbon based plasma.

8. The method of claim 1, wherein the second process includes etching with O₂ mixed with a halogen gas.

9. The method of claim 8, wherein the O₂ and the halogen gas are flowed at a rate from about 50 sccm to about 100 sccm, under a source power from about 200 watts to about 400 watts, and under a bias power from about 20 watts to about 100 watts.

10. A method comprising:

forming a stack of magnetic tunnel junction (MTJ) layers;

forming a metal hard mask layer on the stack of MTJ layers;

forming a hybrid mask layer on the metal hard mask layer, wherein the hybrid mask layers includes one or more carbon-containing layers and one or more silicon-containing layers;

etching, using a first etchant, one of the silicon-containing layers from the one or more silicon-containing layers;

etching, using a second etchant, one of the carbon-containing layers from the one o more carbon-containing layers, the second etchant being different from the first etchant; and

etching the metal hard mask layer and the stack of MTJ layers.

11. The method of claim 10, wherein the first etchant includes fluorine and the second etchant includes a halogen.

12. The method of claim 11, wherein the fluorine includes a material selected from the group consisting of CF₄, CHF₃ and C₄F₈, and

wherein the halogen includes a material selected from the group consisting of Cl₂ and HBr.

13. The method of claim 10, wherein the etching, using the second etchant, of the one of the carbon-containing layers from the one of more carbon-containing layers includes etching another one of the silicon-containing layers from the one or more silicon-containing layers.

14. The method of claim 10, further comprising forming a dielectric layer directly on the metal hard mask layer, the dielectric layer including SiON, and

wherein the etching of the metal hard mask layer and the stack of MTJ layers includes etching the dielectric layer.

15. The method of claim 10, further comprising performing a chemical mechanical polishing process on to remove a remaining portion of the dielectric layer after the etching of the dielectric layer.

16. The method of claim 10, wherein the metal hard mask layer includes a material selected from the group consisting of Ta, Ti, TaN and TiN.

17. A method comprising:

forming a stack of magnetic tunnel junction (MTJ) layers;

forming a top electrode layer directly on the stack of MTJ layers;

forming a dielectric layer directly on the metal hard mask layer;

spin coating a first carbon-containing layer directly on the dielectric layer;

spin coating a first silicon-containing layer directly on the first carbon-containing layer;

spin coating a second carbon-containing layer directly on the first silicon-containing layer;

spin coating a second silicon-containing layer directly on the second carbon-containing layer;

etching, via a first etching process, the second silicon-containing layer;

etching, via a second etching process, the second carbon-containing layer, the first silicon-containing layer and the first carbon-containing layer, the second etching process being different than the first etching process; and

etching, via a third etching process, the dielectric layer, the top electrode layer and the stack of MTJ layers.

18. The method of claim 17, wherein after spin coating the first silicon-containing layer directly on the first carbon-containing layer, the first silicon-containing layer has a first thickness, and

wherein after spin coating the second silicon-containing layer directly on the second carbon-containing layer, the second silicon-containing layer has a second thickness that is greater than the first thickness.

19. The method of claim 17, further comprising forming a bottom electrode layer over a substrate, and

wherein the forming of the stack of MTJ layers includes forming the stack of MTJ layers directly on the bottom electrode.

20. The method of claim 17, wherein the stack of MTJ layers includes a seed layer, a pinned layer, a barrier layer, a free layer, and a cap layer.