POWERING AN ELECTRONIC SYSTEM WITH AN OPTICAL SOURCE TO DEFEAT POWER ANALYSIS ATTACKS
1. A device comprising:
- an optical source providing optical energy directly to a secure circuit within an integrated circuit;
an optical detector optically linked to the optical source;
wherein the optical detector converts optical energy from the optical source into electrical energy; and
the secure circuit within the integrated circuit receiving electrical energy from the optical detector.
A device that is capable of eliminating a power trace that can be analyzed in a power analysis attack and serves as a highly effective countermeasure against power analysis attacks. The device comprising an optical source providing optical energy to an integrated circuit. An optical detector optically linked to the optical source and converts the optical energy from the optical source into electrical energy to power a secure circuit.
- 1. A device comprising:
an optical source providing optical energy directly to a secure circuit within an integrated circuit; an optical detector optically linked to the optical source; wherein the optical detector converts optical energy from the optical source into electrical energy; and the secure circuit within the integrated circuit receiving electrical energy from the optical detector.
- View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
- 12. A device comprising:
an optical source providing optical energy to a secure circuit within an integrated circuit; an optical detector optically linked to the optical source; wherein the optical detector converts optical energy from the optical source into electrical energy; the secure circuit within the integrated circuit connected to the optical detector; wherein the secure circuit within the integrated circuit is configured to receive electrical energy directly from the optical detector; a non-secure circuit within the integrated circuit; electrical leads powering the non-secure circuit and the secure circuit; and a controller configured to switch power delivery to the secure circuit from the electrical leads to the electrical energy provided by the optical detector.
- View Dependent Claims (13, 14, 15, 16, 17, 18, 19)
- 20. A method of powering a device comprising:
providing optical energy to a secure circuit within an integrated circuit from an optical source; optically linking an optical detector to the optical source to receive the optical energy; converting the optical energy into electrical energy; and powering the secure circuit within the integrated circuit with the electrical energy from the optical detector.
- View Dependent Claims (21, 22)
- 23. An optical source powered integrated circuit comprising:
a broad area laser mounted on a first layer of an integrated circuit; an optical detector mounted on the first layer and optically linked to the broad area laser; wherein the optical detector converts optical energy from the broad area laser into electrical energy; a secure circuit embedded within a second layer of the integrated circuit beneath the first layer; and wherein the secure circuit receives electrical energy directly from the optical detector.
- View Dependent Claims (24, 25, 26, 27, 28)
The present disclosure relates generally to apparatuses, systems, devices and methods to protect against power analysis attacks on electronic hardware devices. More specifically, the present disclosure relates to an electronic system powered with an optical source such as a laser so as to provide protection against power analysis attacks.
Present day security often involves using cryptographic algorithms to encrypt secure data. The algorithms themselves are well-known, but they are considered to be very secure from a computational standpoint because knowledge of a secret key is required to encrypt/decrypt the information, and the algorithms are designed to make extraction of that key from observation of the plaintext and/or ciphertext computationally intractable. However, once the secret key is known, the encryption is useless, and an attacker can decrypt all the previously protected secure data. One method of extracting the secret key involves a “brute-force attack,” which involves systematically and exhaustively searching for a potential key. The brute-force attack method can be useful when a key is short and simple, but it becomes computationally expensive when the key is long and complex. Given the challenges of extracting the secret key using a brute-force attack, methods based on inferring a key from the physical implementation of a device rather than systematically and exhaustively searching for a key have been devised. These methods are known as side-channel attacks.
One form of side-channel attack is known as a power-analysis attack. When performing a power analysis attack, an attacker seeks to monitor the power being consumed by a device to make inferences about the computations made by the device and thereby extract the secret key. The power analysis attack entails obtaining and then interpreting power traces, which correspond to measurements (such as the current drawn by a circuit) that are indicative of the power being drawn by the circuit as a function of time.
With respect to the power being drawn by a circuit, there are two types of power—static power and dynamic power. Static power is drawn, for example, when sub-threshold leakage current in the circuit occurs. Dynamic power is drawn when circuit switching occurs. In a digital circuit, this switching corresponds to the changing voltage values at the inputs and outputs of logic gates. In general, the amount of circuit switching is related to the function being performed and the way that function is implemented with logic gates, the current values of the circuit'"'"'s inputs, and the previous values of the circuit'"'"'s inputs. A circuit that is performing an encryption/decryption algorithm draws a large amount of dynamic power. The attacker sends in plaintext or ciphertext into the device. The attacker then monitors the amount of switching activity that occurs by monitoring the amount of dynamic power drawn. Combining the information from the power trace with the information from the plaintext/ciphertext sent in, an attacker is able to extract the secret key.
The instantaneous power drawn by a circuit differs depending on both the key and the text being encrypted/decrypted, and if appropriate statistical measures are employed, the influence of the key on the power trace can be deduced and the secret key determined. For example, secret keys used to protect the intellectual property contained in FPGAs (Field Programmable Gate Arrays) have been found within several hours of computation simply by monitoring and recording the power drawn during the FPGA bootup cycle for later analysis.
Since the inception of power analysis attacks, many countermeasures have been devised to protect against power analysis attacks. One class of countermeasure methods involves employing various circuit techniques to mask the relationship between the key and the power trace. Within this class of methods, for example, some methods use specially designed standard cells or add logic gates to a design to try to even out the power draw. Others try to insert additional random variables, such as delays or noise, to disguise the effect on the power trace. However, none of these methods are perfect and are less effective because a variable power trace is still made available for analysis and extraction of the secret key.
It is therefore desirable to have a device or method that is capable of completely eliminating a variable power trace that can be analyzed and thereby serve as a highly effective countermeasure against a power analysis attack.
The present disclosure provides for a system, device, or method that is capable of eliminating a power trace from a device that can be analyzed in a power analysis attack. The present disclosure therefore serves as a highly effective countermeasure against power analysis attacks.
One aspect of the present disclosure is a device comprising an optical source providing optical energy to an integrated circuit. The device also has an optical detector that is optically linked to the optical source and converts optical energy from the optical source into electrical energy. A secure circuit within the integrated circuit receives the electrical energy from the optical detector. The optical source can be a semiconductor laser, a light emitting diode, a fiber laser, or any source of natural or artificial optical energy. Semiconductor lasers can be edge-emitting or vertical cavity surface emitting lasers (VCSELs), or grating-outcoupled surface-emitting lasers (GSEs).
The optical detector can be a solar cell, a photovoltaic, or a reverse biased photoconductive detector.
Another aspect of the device is that the secure circuit is a circuit that performs switching that draws detectable differences in power when performing the switching and the switching can be used to deduce a key or extract secret information.
Another aspect of the device is that the secure circuit can be a cryptographic circuit that performs cryptographic algorithms and draws detectable differences in power when performing the cryptographic algorithm. The secure circuit can also be used to store highly secure data.
Another aspect of the device is that it has a semiconductor die in which the secure circuit is embedded. Further, the device may comprise a plurality of connections between the optical detector and the secure circuit. The plurality of connections are through-semiconductor vias running through a semiconductor die.
Another aspect of the device is that it comprises a secure circuit and a non-secure circuit. An optical source and an optical detector are optically linked and the optical detector converts optical energy into electrical energy. The secure circuit is connected to the optical detector. Electrical leads also provide power to the non-secure circuit and the secure circuit. A controller in the integrated circuit is configured to switch power delivery to the secure circuit from the electrical leads to the electrical energy provided by the optical detector when the secure circuit is performing a cryptographic algorithm and back when the cryptographic algorithm is completed.
Another aspect is an optical source powered integrated circuit that comprises a broad area laser mounted on a first layer of an integrated circuit providing optical energy to a secure circuit. An optical detector is also mounted on the first layer and is optically linked to the broad area laser. The optical detector converts optical energy from the broad area laser into electrical energy to power a secure circuit embedded within a second layer of the integrated circuit beneath the first layer.
Another aspect of the optical source powered integrated circuit is that the optical detector is spaced from the broad area laser so the far-field beam pattern of the broad area laser uniformly illuminates the optical detector. The broad area laser may be gallium arsenide based and the optical detector may be gallium arsenide based. The broad area laser can have a power conversion efficiency of 40% or more and the optical detector can have a total optical to electrical power conversion efficiency of 20% or more.
The novel features and construction of the present disclosure, as well as additional objects thereof, will be understood more fully from the following description when read in connection with the accompanying drawings.
The present disclosure is further described and explained in relation to the following figures of the drawings wherein:
Like reference numerals are used to describe like parts in all figures of the drawings.
In this embodiment, the power source is a laser. However, the power source is not limited to a laser. The power source can be an optical source that generates optical energy, such as a light emitting diode (LED) or natural light, including solar or artificial lighting. A semiconductor laser emitting in the 850 to 1600 nanometer (nm) wavelength region is an efficient optical source with efficiencies of 40% to 75% to serve as the power source. LEDs, although less efficient at efficiencies of approximately 20%, are becoming more efficient and can serve as a power source.
Electrical power to the circuit 300 is typically obtained through connections to Vcc and Gnd (or Vss) delivered by a power line 320 and a ground line 322. The power line 320 and the ground line 322 are connected to the circuit 300 via a set of pins 314 that include at least a power pin 314a and a ground pin 314b. The pins 314 are in turn connected to the laser 312. The power line 320 and ground line 322 together deliver electrical power to the laser 312 from Vcc and Gnd. The laser 312 converts the electrical energy (i.e., energy made available by the flow of electric charge through a conductor) into optical energy and emits the optical energy in the direction of a detector 310. The detector 310 may be a photodiode or any other type of photo-sensitive device capable of converting optical energy into electrical energy with a current or voltage. The detector 310 may also be a pin detector, an avalanche photo detector (APD) or other types of semiconductor optical detectors. The detector selected should be matched to the emission wavelength range of the optical source. The current derived from the laser 312 by the detector 310 is used to deliver electrical power to the circuit via an internal power line 306 and an internal ground line 308. The internal power line 306 and the internal ground line 308 are embedded within the circuit and are not accessible by external probes to measure the value of the current being delivered through them.
The electrical current delivered from Vcc and Gnd to the laser 312 through the power line 320 and ground line 322 is a constant value regardless of the actual power drawn by the components in the circuit 300. A measurement device 324, such as an oscilloscope, may be used to measure the amount of current traveling through the power line 320 and ground line 322. However, no information regarding the key 304 will be obtainable by the measurement of the amount of current traveling through the power line 320 and ground line 322 because it is not correlated to the circuit'"'"'s switching activity.
Where the detector 310 is embedded within the silicon die 412, there are several methods of powering the laser 312 that is mounted on the surface of the silicon die 412. The laser 312 remains linked to the detector 310 optically. One method for powering the laser 312 is to utilize TSVs running from the bottom of the package and passing through the silicon die 412 (not shown).
The broad-area laser 602 converts the electrical energy from power line 620 into light energy and emits the light energy in the direction of a gallium arsenide based optical detector 604. The optical detector 604 is capable of operating in the photovoltaic mode to produce approximately 700 milliwatts (mW) of electrical power from 300 suns from a surface area of 500 μm2. The direct band gap of a GaAs based optical detector is efficient for monochromatic laser illumination. The far-field intensity distribution of the broad-area laser 602 is elliptical and will have an aspect ratio of between 2:1 to 5:1.
Input power provided to the broad area laser 602 is approximately 2.25 W to produce an output power of 1 W. This is a power conversion efficiency of approximately 44%. After light energy is projected onto the optical detector 604, about 500 mW of electrical power is produced at the output of the optical detector 604. This is a total optical to electrical power conversion efficiency of 22%. With optimization of the optical source and optical detector, efficiencies of greater than 35% can be achieved.
The broad area laser 602 and optical detector 604 are mounted on the surface of a first metallization layer 608. The broad area laser 602 and optical detector 604 are mounted with a spacing on the order of 1 mm apart, allowing the aspect ratio of the optical detector 604 to be optimized to the far-field beam pattern of the broad area laser 602 so the optical detector 604 is uniformly illuminated. Below the first metallization layer 608 is, a second metallization layer 610, a third metallization layer 612, a fourth metallization layer 614, and a fifth metallization layer 616. The encryption circuit (not shown) is buried within the metallization layers (608, 610, 612, 614, 616) and the silicon substrate 626.
Multi-level metallization allows for the optical detector 604 to power the encryption circuit as appropriate. Unlike the power supplied to the broad-area laser 602 by the power line 620 and the ground line 622, the multiple metallization layers (608, 610, 612, 614, 616) are not accessible by external probes. The optical power from the laser 620 results in a secure VDD 624 and a secure ground (not shown) to power the encryption circuit. The only way to access the secure power provided to the metallization layers is by destructive removal of the metallization layers. The encryption circuit (not shown) cannot be probed through the metallization layers and any attempt to access the metallization layers would result in the irreversible destruction of the chip.
In a fourth embodiment of the present disclosure, an optical source powered circuit is constructed with a heat sink. The silicon die, laser, and detector are mounted on a heat sink. The laser is optically linked to the detector so that the laser light emitted by the laser can be detected by the detector. Power is delivered from the detector to the secure circuit by an electrical current running through a power trace and a ground trace.
Note that any and all of the embodiments described above can be combined with each other, except to the extent that it may be stated otherwise above or to the extent that any such embodiments might be mutually exclusive in function and/or structure.
While the present disclosure has been described in conjunction with the embodiments, it will be understood that they are not intended to limit the present disclosure to these embodiments. On the contrary, the present disclosure is intended to cover alternatives, modifications, and equivalents, which may be included within the spirit and scope of the present disclosure as defined by the appended claims. Accordingly, the specification and drawings are to be regarded in an illustrative sense rather than a restrictive sense. Unless otherwise specifically stated, the terms and expressions have been used herein as terms of description and not terms of limitation. There is no intention to use the terms or expressions to exclude any equivalent of features shown and described or portions thereof and this disclosure should be defined in accordance with the claims that follow. For example, the secure circuit being protected does not have to be an encryption circuit but could be another circuit that could contain secret or proprietary information or functionality that could otherwise be compromised through a power analysis attack.
Where reference is made herein to a method comprising two or more defined steps, the defined steps can be carried out in any order or simultaneously (except where the context excludes that possibility), and the method can include one or more other steps which are carried out before any of the defined steps, between two of the defined steps, or after all the defined steps (except where the context excludes that possibility).
Any element in a claim that does not explicitly state “means for” performing a specified function, or “step for” performing a specific function, is not to be interpreted as a “means” or “step” clause as specified in 35 U.S.C. § 112, ¶ 6. In particular, the use of “step of” in the claims herein is not intended to invoke the provisions of 35 U.S.C. § 112, ¶ 6.