SWITCH CIRCUIT WITH HIGH VOLTAGE PROTECTION THAT REDUCES LEAKAGE CURRENTS

• US 20200136381A1
• Filed: 10/30/2018
• Published: 04/30/2020
• Est. Priority Date: 10/30/2018
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Inventors: WU, Hong Bing, LI, Young Liang, SUN, WeiMing
• Granted Patent: US 11,088,540 B2
• Time in Patent Office: Days
• CPC Class Codes: G01N 27/048 for determining moisture content of the material
• CPC Class Codes: H01R 13/713 the switch being a safety switch
• CPC Class Codes: H02H 1/0007 concerning the detecting means in general G01R or other subclasses of G01; reed switches H01H71/2445
• CPC Class Codes: H02H 3/20 responsive to excess voltage
• CPC Class Codes: H02H 7/222 for switches
• CPC Class Codes: H02H 9/045 adapted to a particular application and not provided for elsewhere
• CPC Class Codes: H03K 17/08104 in field-effect transistor switches H03K17/0812, H03K17/0814 take precedence
• CPC Class Codes: H03K 17/693 Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors logic circuits H03K19/00; code converters H03M5/00, H03M7/00

Abstract

According to an aspect, a switch circuit for a Universal Serial Bus (USB) connector device includes a main transistor configured to be activated during a normal operation of the switch circuit, a first voltage generator circuit configured to generate a voltage on a high local rail during an overvoltage event, a second voltage generator circuit configured to generate a voltage on a low local rail during the overvoltage event, where the low local rail is connected to a bulk of the main transistor, and a clamp circuit connected to the high local rail between the first voltage generator circuit and a gate of the main transistor, where the clamp circuit is configured to clamp the voltage between the high local rail and the gate of the main transistor during the overvoltage event.

Claims

1. A switch circuit for a Universal Serial Bus (USB) connector device, the switch circuit comprising:

a main transistor configured to be activated during a normal operation of the switch circuit, the main transistor configured to be deactivated during an overvoltage event;

a first voltage generator circuit configured to generate a voltage on a high local rail during the overvoltage event;

a second voltage generator circuit configured to generate a voltage on a low local rail during the overvoltage event, the low local rail being connected to a bulk of the main transistor; and

a clamp circuit connected to the high local rail between the first voltage generator circuit and a gate of the main transistor, the clamp circuit configured to clamp the voltage between the high local rail and the gate of the main transistor during the overvoltage event.

2. The switch circuit of claim 1, wherein the clamp circuit includes a first diode and a second diode.

3. The switch circuit of claim 1, wherein the first voltage generator circuit is configured to provide either a drain voltage of the main transistor or a source voltage of the main transistor as the voltage on the high local rail, whichever is larger.

4. The switch circuit of claim 1, wherein the second voltage generator circuit is configured to provide either a drain voltage of the main transistor or a source voltage of the main transistor as the voltage on the low local rail, whichever is smaller.

5. The switch circuit of claim 1, further comprising:

a first bias circuit configured to generate a voltage on the high local rail during the normal operation; and

a second bias circuit configured to generate a voltage on the low local rail during the normal operation.

6. The switch circuit of claim 5, wherein the first bias circuit is configured to generate the voltage on the high local rail as one half times a sum of a drain voltage of the main transistor and a source voltage of the main transistor, and the second bias circuit is configured to generate the voltage on the low local rail as one half times a sum of the drain voltage and the source voltage.

7. The switch circuit of claim 1, further comprising:

a constant gate-source circuit connected to the main transistor, the constant gate-source circuit configured to generate a substantially constant gate-source voltage for the main transistor during the normal operation, the constant gate-source circuit connected to the gate of the main transistor and a low rail.

8. The switch circuit of claim 7, wherein the constant gate-source circuit includes a first diode and a transistor.

9. The switch circuit of claim 8, wherein the constant gate-source circuit includes a second diode and a resistor, the second diode and the resistor are configured to protect the transistor during the overvoltage event.

10. The switch circuit of claim 1, further comprising:

a driver circuit configured to deactivate the main transistor in response to a voltage on a common node exceeding a threshold level.

11. A switch device comprising:

a first switch circuit; and

a second switch circuit connected in-series to the first switch circuit, the first switch circuit and the second switch circuit defining a switch path from a common node to an end node, the first switch circuit including;

a main transistor configured to be activated during a normal operation of the switch device, the main transistor configured to be deactivated during an overvoltage event; and

a constant gate-source circuit connected to the main transistor, the constant gate-source circuit configured to generate a substantially constant gate-source voltage for the main transistor during the normal operation, the constant gate-source circuit connected to the gate of the main transistor and a low rail.

12. The switch device of claim 11, wherein the first switch circuit further includes:

a clamp circuit connected to clamp the voltage between a high local rail and the gate of the main transistor during the overvoltage event, the high local rail being connected to the gate of the main transistor through the clamp circuit, the clamp circuit configured to protect the main transistor from incurring a Safe Operating Range (SOA) warning during the overvoltage event.

13. The switch device of claim 12, wherein the clamp circuit includes a diode and a Zener diode.

14. The switch device of claim 11, wherein the first switch circuit further includes:

a voltage generator circuit configured to generate a voltage on a high local rail during the overvoltage event, the voltage generator circuit configured to protect the main transistor from incurring a Safe Operating Range (SOA) warning during the overvoltage event.

15. The switch device of claim 11, wherein the first switch circuit further includes:

a voltage generator circuit configured to generate a voltage on a low local rail during the overvoltage event, the low local rail being connected to a bulk of the main transistor, the voltage generator circuit configured to protect the main transistor from incurring a Safe Operating Range (SOA) warning during the overvoltage event.

16. The switch device of claim 11, wherein the constant gate-source circuit includes a first diode, a transistor, a second diode, and a resistor.

17. The switch device of claim 11, further comprising:

a moisture detection circuit configured to detect a presence of moisture in air or on the common node; and

an overvoltage protection circuit configured to detect the overvoltage event by determining that a voltage on the common node exceeds a threshold level.

18. The switch device of claim 11, wherein the first switch circuit includes:

a first bias circuit configured to generate a voltage on a high local rail during the normal operation, the high local rail being connected to the gate of the main transistor; and

a second bias circuit configured to generate a voltage on a low local rail during the normal operation, the low local rail being connected to a bulk of the main transistor.

19. A method for reducing leakage current in a switch device, comprising:

activating a first transistor of a driver circuit of a switch circuit;

charging a gate of a main transistor of the switch circuit using a pull-up current in order to activate the main transistor; and

connecting the gate of the main transistor to a low rail such that the pull-up current flows to the low rail.

20. The method of claim 19, further comprising:

activating a second transistor of the driver circuit and deactivating the first transistor in response to an overvoltage signal;

clamping a voltage on a high local rail, the high local rail being connected to the gate of the main transistor.