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ADAPTIVE SYNCHRONOUS RECTIFICATION IN A VOLTAGE CONVERTER

  • US 20200136508A1
  • Filed: 04/30/2019
  • Published: 04/30/2020
  • Est. Priority Date: 10/24/2018
  • Status: Active Grant
First Claim
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1. A circuit, comprising:

  • a first transistor;

    a second transistor coupled to the first transistor at a switch node and to a ground node;

    an estimator circuit configured to receive a first signal to control an on and off state of the first transistor, the estimator circuit configured to generate a second signal to control the on and off state of the second transistor, the second signal configured to have a pulse width based on a pulse width of the first signal; and

    a clocked comparator including a clock input, a first input, and a second input, the first input configured to receive a voltage indicative of a voltage of the switch node, the second input coupled to a ground node, and the clock input is configured to receive a third signal indicative of the second signal, the clocked comparator configured to generate a comparator output signal;

    wherein the estimator circuit is configured to adjust the pulse width of the second signal based on the comparator output signal.

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