Method for Operating a Switched Mode Power Supply of the Buck Type and Corresponding Switched Mode Power Supply
First Claim
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1. A method for operating a voltage step-down switched mode power supply, the method comprising:
- delivering an output voltage with an output stage having a power transistor that is cyclically made conducting by a first control signal; and
when operating the switched mode power supply in a pulse width modulation (PWM) mode,generating an error voltage based on the output voltage and a reference voltage; and
applying a first delay on the first control signal, the first delay being determined so as to reduce a difference between the error voltage and the reference voltage.
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Abstract
In an embodiment, a method for operating a voltage step-down switched mode power supply includes delivering an output voltage with an output stage having a power transistor that is cyclically made conducting by a first control signal. In PWM mode, the method includes generating an error voltage based on the output voltage and a reference voltage, and applying a first delay on a first control signal. The first delay is determined so as to reduce a difference between the error voltage and the reference voltage.
1 Citation
27 Claims
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1. A method for operating a voltage step-down switched mode power supply, the method comprising:
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delivering an output voltage with an output stage having a power transistor that is cyclically made conducting by a first control signal; and when operating the switched mode power supply in a pulse width modulation (PWM) mode, generating an error voltage based on the output voltage and a reference voltage; and applying a first delay on the first control signal, the first delay being determined so as to reduce a difference between the error voltage and the reference voltage. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A voltage step-down switched mode power supply comprising:
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an output stage comprising a power transistor configured to be cyclically made conducting by a first control signal; and a processing circuit configured to generate an error voltage based on an output voltage of the switched mode power supply and on a reference voltage and to apply, in a pulse width modulation (PWM) mode, a first delay on the first control signal, the first delay being determined so as to reduce a difference between the error voltage and the reference voltage. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21, 22, 23, 24)
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25. A device comprising:
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an output stage configured to generate an output voltage and comprising a power transistor configured to be cyclically made conducting by a first control signal; a control circuit configured to receive a clock signal and a delayed clock signal and configured to generate the first control signal based on a first intermediate signal or on a second intermediate signal; and a processing circuit comprising; a ramp generator configured to generate a ramp voltage, a first signal generator circuit comprising an amplifier that is configured to generate, in a pulse width modulation (PWM) mode, an error voltage based on the output voltage and on a reference voltage, the first signal generator circuit configured to generate, in the PWM mode, the first intermediate signal based on the error voltage and the ramp voltage, the first signal generator circuit having a first intrinsic propagation time, a second signal generator circuit configured to generate, in a pulse frequency modulation (PFM) mode, the second intermediate signal based on the reference voltage and the ramp voltage, the second signal generator circuit having a second intrinsic propagation time, and a delay circuit configured to receive the clock signal, and generate, in the PWM mode, the delayed clock signal having a first delay with respect to the clock signal, the first delay being about equal to the first intrinsic propagation time, wherein the control circuit is configured to delay the first control signal by the first delay in PWM mode. - View Dependent Claims (26, 27)
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Specification