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CLOCK GENERATION CIRCUIT AND CLOCK ADJUSTMENT METHOD THEREOF

  • US 20200136597A1
  • Filed: 10/23/2019
  • Published: 04/30/2020
  • Est. Priority Date: 10/25/2018
  • Status: Active Grant
First Claim
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1. A clock generation circuit, comprising:

  • a fixed clock source generating a reference clock signal having a fixed frequency;

    a variable clock source receiving a frequency setting signal to correspondingly generate an operational clock signal having a variable frequency;

    a timing adjustment circuit coupled to the fixed clock source and the variable clock source to receive the reference clock signal and the operational clock signal, determining whether a frequency of the operational clock signal is N times of a target frequency according to the reference clock signal, providing the changed frequency setting signal to the variable clock source to change the frequency of the operational clock signal when the frequency of the operational clock signal is not N times of the target frequency, and maintaining a frequency of the current operational clock signal when the frequency of the operational clock signal is N times of the target frequency, wherein N is an integer greater than one; and

    a pulse width signal generator coupled to the variable clock source to receive the operational clock signal, and dividing the frequency of the operational clock signal to generate a pulse width modulation signal having the target frequency.

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