METHOD FOR CONTROLLING A DIRECT CURRENT SWITCH, DIRECT CURRENT SWITCH, AND DC VOLTAGE SYSTEM

• US 20200136604A1
• Filed: 03/13/2018
• Published: 04/30/2020
• Est. Priority Date: 03/23/2017
• Status: Active Grant

• Current Assignee: Siemens AG
• Original Assignee: Siemens AG
• Inventors: SCHIERLING, Hubert, KALUZA, Peter, WEIS, BENNO
• Granted Patent: US 11,075,623 B2
• Time in Patent Office: Days
• CPC Class Codes: H03K 17/08128 in composite switches
• CPC Class Codes: H03K 17/082 by feedback from the output to the control circuit
• CPC Class Codes: H03K 17/0822 in field-effect transistor switches
• CPC Class Codes: H03K 17/567 Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT
• CPC Class Codes: H03K 17/602 in integrated circuits
• CPC Class Codes: H03K 17/68 specially adapted for switching ac currents or voltages
• CPC Class Codes: H03K 17/6874 in a symmetrical configuration
• CPC Class Codes: H03K 2217/0009 AC switches, i.e. delivering AC power to a load
• CPC Class Codes: H03K 2217/0081 Power supply means, e.g. to the switch driver

Abstract

In a method for controlling a direct current switch having first and second semiconductor switches capable of being switched off, the first and second semiconductor switches are arranged between first and second terminals to enable conduction of a current with a first polarity through the first semiconductor switch and conduction of the current with a second polarity that is opposite to the first polarity through the second semiconductor switch. One of the first and second semiconductor switches is switched off as a function of a current measurement value.

Claims

1-19. -19. (canceled)

20. A method for controlling a direct current switch, in particular a fault current switch or a circuit-breaker, with the direct current switch having first and second semiconductor switches capable of being switched off, said method comprising:

arranging the first and second semiconductor switches between first and second terminals to enable conduction of a current with a first polarity through the first semiconductor switch and conduction of the current with a second polarity that is opposite to the first polarity through the second semiconductor switch; and

switching off one of the first and second semiconductor switches as a function of a current measurement value.

21. The method of claim 20, wherein the first and second semiconductor switches are arranged antiserially.

22. The method of claim 20, wherein the first and second semiconductor switches are arranged in an antiparallel circuit and are each embodied in particular as a reverse-blocking IGBT.

23. The method of claim 20, further comprising switching off one of the first and second semiconductor switches in a fault situation.

24. The method of claim 23, further comprising detecting the fault situation as a function of a time derivation of the current measurement value to switch off the one of the first and second semiconductor switches.

25. The method of claim 20, wherein precisely one of the first and second semiconductor switches is switched off.

26. The method of claim 20, wherein switching off the one of the first and second semiconductor switches is selected as a function of a polarity of the current measurement value of the current.

27. The method of claim 20, wherein switching off the one of the first and second semiconductor switches is implemented at a first limit value of the first polarity and at a second limit value of the second polarity, with the first limit value being greater than the second limit value by at least 25%.

28. The method of claim 20, further comprising:

detecting a short circuit by U_CE monitoring; and

switching off the short circuit by a local control device configured to trigger the first and second semiconductor switches, in particular independently of a superordinate controller.

29. The method of claim 20, further comprising:

determining a of the first and second semiconductor switches by formation of an i*t value or i²*t value; and

switching off the one of the first and second semiconductor switches, when a load limit value is exceeded.

30. The method of claim 20, further comprising:

registering a further current measurement value at a point at which a return current associated with the current measurement value is assumed;

forming a difference between the current measurement value and the further current measurement value; and

switching off the one of the first and second semiconductor switches, when an amount of the difference is exceeded.

32. A direct current switch, comprising:

first and second terminals;

first and second semiconductor switches capable of being switched off and arranged between the first and second terminals to enable conduction of a current with a first polarity through the first semiconductor switch and conduction of the current with a second polarity that is opposite to the first polarity through the second semiconductor switch; and

a local control device configured to switch off the current through the direct current switch as a function of a current measurement value by switching off one of the first and second semiconductor switches.

31. The method of claim 33, wherein the difference is formed frequency-selectively, in particular for frequencies below 1 kHz.

33. The direct current switch of claim 32, further comprising a comparator configured to detect a polarity of the current.

34. The direct current switch of claim 32, wherein each of the first and second semiconductor switches has U_CE monitoring.

35. The direct current switch of claim 32, further comprising a protection element between one of the first and second terminals and one of the first and second semiconductor switches.

36. The direct current switch of claim 35, wherein the protection element is at least one of a switch-disconnector and a fuse.

37. The direct current switch of claim 32, further comprising a current measurement device and/or a voltage measurement device.

38. The direct current switch of claim 32, further comprising a superordinate controller configured to switch on and off the first and second semiconductor switches, said local control device including an interface to the superordinate controller.

39. A DC voltage system, comprising:

an energy source having a DC voltage;

an electric load having a DC voltage connection; and

a direct current switch connected to the energy source and the electric load, said direct current switch comprising first and second terminals, first and second semiconductor switches capable of being switched off and arranged between the first and second terminals to enable conduction of a current with a first polarity through the first semiconductor switch and conduction of the current with a second polarity that is opposite to the first polarity through the second semiconductor switch, and a local control device configured to switch off the current through the direct current switch as a function of a current measurement value by switching off one of the first and second semiconductor switches.