GAIN CALIBRATION DEVICE AND METHOD FOR RESIDUE AMPILIFIER OF PIPELINE ANALOG TO DIGITAL CONVERTER

• US 20200136633A1
• Filed: 07/08/2019
• Published: 04/30/2020
• Est. Priority Date: 10/26/2018
• Status: Active Grant

• Current Assignee: Realtek Semiconductor Corp.
• Original Assignee: Realtek Semiconductor Corp.
• Inventors: LEE, CHI-YING
• Granted Patent: US 10,826,516 B2
• Time in Patent Office: Days
• CPC Class Codes: H03G 3/20 Automatic control H03G3/005 takes precedence; combined with volume compression or expansion H03G7/00
• CPC Class Codes: H03G 3/30 in amplifiers having semiconductor devices
• CPC Class Codes: H03M 1/00 Analogue/digital conversion; Digital/analogue conversion conversion of analogue values to or from differential modulation H03M3/00
• CPC Class Codes: H03M 1/001 Analogue/digital/analogue conversion
• CPC Class Codes: H03M 1/06 Continuously compensating for, or preventing, undesired influence of physical parameters periodically, e.g. by using stored correction values, H03M1/10
• CPC Class Codes: H03M 1/0695 using less than the maximum number of output states per stage or step, e.g. 1.5 per stage or less than 1.5 bit per stage type
• CPC Class Codes: H03M 1/1009 Calibration
• CPC Class Codes: H03M 1/1014 at one point of the transfer characteristic, i.e. by adjusting a single reference value, e.g. bias or gain error gain setting for range control H03M1/18
• CPC Class Codes: H03M 1/1033 over the full range of the converter, e.g. for correcting differential non-linearity
• CPC Class Codes: H03M 1/1038 by storing corrected or correction values in one or more digital look-up tables H03M1/1057 takes precedence
• CPC Class Codes: H03M 1/12 Analogue/digital converters H03M1/001 – H03M1/10 take precedence
• CPC Class Codes: H03M 1/121 Interleaved, i.e. using multiple converters or converter parts for one channel
• CPC Class Codes: H03M 1/168 and delivering the same number of bits
• CPC Class Codes: H03M 1/361 having a separate comparator and reference value for each quantisation level, i.e. full flash converter type
• CPC Class Codes: H03M 1/66 Digital/analogue converters H03M1/001 – H03M1/10 take precedence

Abstract

A gain calibration device for an ADC residue amplifier includes a DAC and a flash ADC. The DAC is configured to convert the digital signal to an analog signal, and the DAC includes a calibration module used in the gain calibration of the ADC residual amplifier. The flash ADC is configured to generate a digital signal, the flash ADC includes a plurality of comparators, the total number of the plurality of comparators is equal to the number of output bits of the flash ADC, and the comparators are configured to be unevenly distributed in an input range.

Claims

1. A gain calibration device for an analog to digital converter (ADC) residual amplifier, the gain calibration device comprising:

a digital to analog converter (DAC) configured to convert a digital signal to an analog signal, wherein the DAC includes a calibration module used in a gain calibration of the ADC residue amplifier; and

a flash analog to digital converter (ADC) configured to generate the digital signal and including a plurality of comparators,

wherein a number of the plurality of comparators is equal to a number of output bits of the flash ADC, and wherein the plurality of comparators are uneven comparators providing a plurality of threshold voltages that are unevenly distributed in a input range.

2. The gain calibration device according to claim 1, wherein the flash ADC is configured to generate the digital signal by digitally converting a sampling signal of an input signal.

3. The gain calibration device according to claim 2, further including a part of a stage of a pipeline analog-digital converter (ADC), wherein the pipeline ADC includes the ADC residue amplifier configured to amplify a residue signal.

4. The gain calibration device according to claim 3, wherein the residue signal is generated by subtracting the analog signal from the sampling signal of the input signal.

5. The gain calibration device according to claim 2, wherein the input range includes a zero point voltage of the input signal.

6. The gain calibration device according to claim 1, wherein the DAC includes a multiply digital to analog converter, wherein the calibration module includes a calibration capacitor configured to be charged with a reference voltage in a calibration interval.

7. The gain calibration device according to claim 6, wherein the calibration capacitor is configured to be charged to an electric potential equal to ½

of the input range, and wherein the threshold voltages provided by the uneven comparator is set to avoid a negative effect of a calibration signal in a dynamic range of the residue amplifier.

8. The gain calibration device according to claim 1, wherein the gain calibration of the ADC residue amplifier includes a background calibration, and wherein the background calibration is performed by inputting a calibration signal to the DAC.

9. The gain calibration device according to claim 8, wherein the input of the calibration signal is controlled by a pseudo-random noise sequence.

10. The gain calibration device according to claim 9, wherein an input of the calibration signal is allowed when amplitude of the input signal is located in the input range.

11. A gain calibration method for an analog to digital converter (ADC) residue amplifier, comprising:

configuring a flash analog to digital converter (ADC) to generate a digital signal, wherein the flash ADC includes a plurality of comparators, and a number of the plurality of comparators is equal to a number of output bits of the flash ADC;

configuring the plurality of comparators to provide a plurality of threshold voltages in an input range, wherein the plurality of comparators are uneven comparators providing the plurality of threshold voltages that are unevenly distributed in the input range;

configuring a digital to analog converter (DAC) to convert the digital signal to an analog signal; and

configuring a calibration module of the DAC to perform a gain calibration for the ADC residue amplifier.

12. The gain calibration method according to claim 11, wherein the flash ADC is configured to generate the digital signal by digitally converting a sampling signal of an input signal.

13. The gain calibration method according to claim 12, further including a part of a stage of a pipeline analog-digital converter (ADC), wherein the pipeline ADC includes the ADC residue amplifier configured to amplify a residue signal.

14. The gain calibration method according to claim 13, wherein the residue signal is generated by subtracting the analog signal from the sampling signal of the input signal.

15. The gain calibration method according to claim 12, wherein the input range includes a zero point voltage of the input signal.

16. The gain calibration method according to claim 11, wherein the DAC includes a multiply digital to analog converter, and wherein the calibration module includes a calibration capacitor configured to be charged with a reference voltage in a calibration interval.

17. The gain calibration method according to claim 16, wherein the calibration capacitor is configured to be charged to an electric potential equal to ½

of the input range, and wherein the threshold voltages provided by the uneven comparator is set to avoid a negative effect of a calibration signal in a dynamic range of the residue amplifier.

18. The gain calibration method according to claim 11, wherein the gain calibration of the ADC residue amplifier includes a background calibration, and wherein the background calibration is performed by inputting a calibration signal to the DAC.

19. The gain calibration method according to claim 18, wherein the input of the calibration signal is controlled by a pseudo-random noise sequence.

20. The gain calibration method according to claim 18, wherein an input of the calibration signal is allowed when amplitude of the input signal is within the input range.