Second Order Harmonic Cancellation for Radio Frequency Front-End Switches

• US 20200136669A1
• Filed: 12/23/2019
• Published: 04/30/2020
• Est. Priority Date: 05/08/2013
• Status: Abandoned Application

• Current Assignee: Skyworks Solutions Incorporated
• Original Assignee: Skyworks Solutions Incorporated
• Inventors: Zhao, Huan, Li, Qiang
• Application Number:
  US16/725,046
• Publication Number:
  US 20200136669A1
• Time in Patent Office: Days
• CPC Class Codes: H04B 1/48 in circuits for connecting transmitter and receiver to a common transmission path, e.g. by energy of transmitter H04B1/46 takes precedence
• CPC Class Codes: H04B 2001/485 inhibiting unwanted transmission

Abstract

A radio frequency switch circuit with improved harmonic suppression and low insertion loss has an antenna port and a plurality of signal ports. A plurality of transistor switch circuits, are connected to a respective one of the plurality of signal ports and to the antenna port. Each of the transistor switch circuits has a transistor, which in an off state, together with a harmonic suppression capacitor and a parallel inductor both connected thereto, define a tank circuit that suppresses RF signals applied to the corresponding transistor switch circuit from a different one of the transistor switch circuits. The harmonic suppression capacitor is tuned to distribute large signal voltage swings in the RE signal amongst parasitic diodes of the transistor.

Claims

1-20. -20. (canceled)

21. A radio frequency switch, comprising:

an antenna port;

a plurality of signal ports;

a plurality of control line ports; and

a plurality of transistor switch circuits each connected to a respective one of the plurality of signal ports, to a respective one of the control line ports, and to the antenna port, each of the transistor switch circuits including a transistor that defines a tank circuit for suppression of radio frequency signals applied to the corresponding transistor of a different one of the transistor switch circuits.

22. The radio frequency switch of claim 21 further comprising a plurality of harmonic suppression capacitors each connected to a respective one of the transistor switch circuits.

23. The radio frequency switch of claim 22 further comprising a plurality of parallel inductors each connected to a respective one of the transistor switch circuits.

24. The radio frequency switch of claim 23 wherein each of the transistors of the plurality of transistor switch circuits is defined by a gate, a source, a drain, and a body.

25. The radio frequency switch of claim 24 wherein each of the harmonic suppression capacitors is connected between the body and the drain of the respective transistor.

26. The radio frequency switch of claim 24 wherein each of the inductors is connected between the source and the drain of the respective transistor.

27. The radio frequency switch of claim 24 wherein each of the plurality of control line ports is connected to the respective gate of the transistors.

28. The radio frequency switch of claim 27 wherein each of the transistors is independently activatable in response to an enable signal applied to the corresponding one of the plurality of control line ports connected to the gate thereof.

29. The radio frequency switch circuit of claim 22 wherein the harmonic suppression capacitors are tuned to distribute large signal voltage swings in a radio frequency signal amongst parasitic diodes of the transistors.

30. The antenna switch circuit of claim 29 wherein a first one of the parasitic diodes of each of the transistors is between the body and the drain thereof, and a second one of the parasitic diodes of each of the transistors is between the body and the source thereof.

31. An antenna switch circuit, comprising:

an antenna port;

a plurality of signal ports;

a plurality of transistors each including a gate, a source, a drain, and a body, the source of each of the plurality of transistors being connected to a respective one of the signal ports and the drain of each of the plurality of transistors being connected to the antenna port;

a plurality of harmonic suppression capacitors each connected to the body and to the drain of each of the plurality of transistors; and

a plurality of parallel inductors each connected to the source and to the drain of each of the plurality of transistors.

32. The antenna switch circuit of claim 31 wherein one of the plurality of harmonic suppression capacitors and one of the plurality of parallel inductors defines a tank circuit with the corresponding one of the transistor to which the one of the plurality of harmonic suppression capacitors and the one of the plurality of parallel inductors are connected.

33. The antenna switch circuit of claim 31 wherein the harmonic suppression capacitors are tuned to distribute large signal voltage swings in a radio frequency signal amongst parasitic diodes of the transistors.

34. The antenna switch circuit of claim 33 wherein a first one of the parasitic diodes of each of the transistors is between the body and the drain thereof, and a second one of the parasitic diodes of each of the transistors is between the body and the source thereof.

35. The antenna switch circuit of claim 34 wherein the tank circuit blocks the radio frequency signal at the drain of the one of the plurality of transistors.

36. An antenna switch circuit, comprising:

an antenna port;

a plurality of signal ports;

a plurality of transistors each including a gate, a source, a drain, and a body, one of the source and the drain of each of the plurality of transistors being connected to a respective one of the signal ports, and the other of the source and the drain of each of the plurality of transistors being connected to the antenna port;

a plurality of harmonic suppression capacitors each connected to the body and to the drain of each of the plurality of transistors; and

a plurality of parallel inductors each connected to the source and to the drain of each of the plurality of transistors.

37. The antenna switch circuit of claim 36 wherein one of the plurality of harmonic suppression capacitors and one of the plurality of parallel inductors defines a tank circuit with the corresponding one of the transistor to which the one of the plurality of harmonic suppression capacitors and the one of the plurality of parallel inductors are connected.

38. The antenna switch circuit of claim 36 wherein the harmonic suppression capacitors are tuned to distribute large signal voltage swings in a radio frequency signal amongst parasitic diodes of the transistors.

39. The antenna switch circuit of claim 38 wherein a first one of the parasitic diodes of each of the transistors is between the body and the drain thereof, and a second one of the parasitic diodes of each of the transistors is between the body and the source thereof.

40. The antenna switch circuit of claim 39 wherein the tank circuit blocks the radio frequency signal at the drain of the one of the plurality of transistors.