Encapsulated semiconductor assembly
First Claim
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1. IN COMBINATION, A HOUSING FOR HOUSING A SEMICONDUCTOR ELEMENT HAVING ELECTRODES ASSOCIATED THEREWITH AND ENGAGING SAID ELEMENT AT JUNCTION AREAS THEREON, A FIRST COATING OF ELECTRICAL INSULATING MATERIAL POSITIONED ON THE EXTERIOR SURFACE OF SAID ELEMENT HOUSING AND ON THE EXTERIOR SURFACE OF SAID ELECTRODES TO WITHIN A TERMINAL PORTION ON THE ENDS THEREOF, A SECOND COATING OF METALLIC COMPOSITION POSITIONED ON SAID FIRST COATING, SAID COMPOSITION HAVING A MELTING POINT INTERMEDIATE THE MAXIMUM JUNCTION AREA TEMPERATURE FOR SAID ELEMENT AND THE
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1 Claim
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1. IN COMBINATION, A HOUSING FOR HOUSING A SEMICONDUCTOR ELEMENT HAVING ELECTRODES ASSOCIATED THEREWITH AND ENGAGING SAID ELEMENT AT JUNCTION AREAS THEREON, A FIRST COATING OF ELECTRICAL INSULATING MATERIAL POSITIONED ON THE EXTERIOR SURFACE OF SAID ELEMENT HOUSING AND ON THE EXTERIOR SURFACE OF SAID ELECTRODES TO WITHIN A TERMINAL PORTION ON THE ENDS THEREOF, A SECOND COATING OF METALLIC COMPOSITION POSITIONED ON SAID FIRST COATING, SAID COMPOSITION HAVING A MELTING POINT INTERMEDIATE THE MAXIMUM JUNCTION AREA TEMPERATURE FOR SAID ELEMENT AND THE
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